| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-06-19 | clk: keystone: add support for post divider register for main pll | Murali Karicheri | 1 | -2/+18 |
| 2014-02-11 | clk: keystone: gate: fix clk_init_data initialization | Ivan Khoronzhuk | 1 | -0/+1 |
| 2013-12-10 | clk: keystone: gate: fix error handling on init | Grygorii Strashko | 1 | -4/+8 |
| 2013-12-10 | clk: keystone: use clkod register bits for postdiv | Murali Karicheri | 1 | -4/+20 |
| 2013-10-08 | clk: keystone: Build Keystone clock drivers | Santosh Shilimkar | 1 | -0/+1 |
| 2013-10-08 | clk: keystone: Add gate control clock driver | Santosh Shilimkar | 1 | -0/+264 |
| 2013-10-08 | clk: keystone: add Keystone PLL clock driver | Santosh Shilimkar | 1 | -0/+305 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |