BMC/Intel-BMC/linux.git - Intel OpenBMC Linux kernel source tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2015-08-25	clk: Hi6220: add stub clock driver	Leo Yan	3	-2/+278
2015-08-04	clk: hisi: refine parameter checking for init	Leo Yan	1	-8/+3
2015-07-28	Merge branch 'cleanup-clk-h-includes' into clk-next	Stephen Boyd	4	-8/+1
2015-07-28	clk: fix some determine_rate implementations	Boris Brezillon	1	-1/+1
2015-07-28	clk: change clk_ops' ->determine_rate() prototype	Boris Brezillon	1	-22/+17
2015-07-20	clk: hisilicon: Remove clk.h include	Stephen Boyd	4	-8/+1
2015-06-05	clk: make several parent names const	Uwe Kleine-König	3	-39/+39
2015-06-04	Merge branch 'clk-next-hi6220' into clk-next	Michael Turquette	6	-12/+505
2015-06-04	clk: hi6220: Clock driver support for Hisilicon hi6220 SoC	Bintian Wang	6	-1/+494
2015-06-03	clk: hisilicon: Remove __init for marking function prototypes	Bintian Wang	1	-11/+11
2015-05-15	clk: hix5hd2: Silence sparse warnings	Stephen Boyd	1	-2/+3
2015-04-13	clk: don't use __initconst for non-const arrays	Uwe Kleine-König	2	-38/+38
2015-02-03	clk: Add rate constraints to clocks	Tomeu Vizoso	1	-0/+2
2014-12-04	clk: Change clk_ops->determine_rate to return a clk_hw as the best parent	Tomeu Vizoso	1	-1/+1
2014-11-20	clk: hi3620: Move const initdata into correct code section	Bintian Wang	1	-35/+35
2014-09-28	clk: hix5hd2: add I2C clocks	Wei Yan	1	-0/+25
2014-09-28	clk: hix5hd2: add watchdog0 clocks	Guoxiong Yan	1	-0/+5
2014-09-28	clk: hix5hd2: add sd clk	Jiancheng Xue	1	-6/+15
2014-09-28	clk: hix5hd2: add complex clk	Zhangfei Gao	1	-0/+181
2014-05-12	clk: hisi: add clk-hix5hd2.c	Zhangfei Gao	2	-0/+102
2014-05-12	clk: hisi: add hisi_clk_register_gate	Zhangfei Gao	2	-0/+30
2014-05-12	clk: hisi: use clk_register_mux_table in hisi_clk_register_mux	Zhangfei Gao	2	-5/+9
2014-03-21	clk: hisilicon: fix warning from smatch	Zhangfei Gao	1	-8/+7
2014-03-19	Merge tag 'clk-hisi' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhua...	Mike Turquette	5	-39/+128
2014-03-19	clk: hisi: remove static variable	Haojian Zhuang	4	-42/+72
2014-03-19	clk: hip04: add clock driver	Haojian Zhuang	2	-1/+58
2014-03-19	clk: hisi: assign missing clk to table	Haojian Zhuang	1	-0/+2
2014-02-27	clk: hisilicon: add hi3620_mmc_clks	Zhangfei Gao	1	-0/+274
2013-12-11	clk: hi3620: add gate clock flag	Haojian Zhuang	1	-59/+59
2013-12-11	clk: hi3620: fix wrong flags on divider	Haojian Zhuang	1	-11/+11
2013-12-04	clk: hisilicon: add common clock support	Haojian Zhuang	5	-0/+651