BMC/Intel-BMC/linux.git - Intel OpenBMC Linux kernel source tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2017-09-25	clk: bcm2835: remove remains from stub clk driver	Danilo Krummrich	1	-30/+0
2017-06-03	clk: bcm2835: Minimise clock jitter for PCM clock	Phil Elwell	1	-5/+29
2017-06-03	clk: bcm2835: Limit PCM clock to OSC and PLLD_PER	Phil Elwell	1	-1/+26
2017-06-03	clk: bcm2835: Correct the prediv logic	Phil Elwell	1	-1/+3
2017-01-21	clk: bcm2835: Add leaf clock measurement support, disabled by default	Eric Anholt	1	-25/+119
2017-01-21	clk: bcm2835: Register the DSI0/DSI1 pixel clocks.	Eric Anholt	1	-12/+109
2017-01-21	clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.	Eric Anholt	1	-14/+28
2016-12-12	clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_p...	Boris Brezillon	1	-1/+1
2016-12-09	clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock	Boris Brezillon	1	-1/+6
2016-12-09	clk: bcm: Support rate change propagation on bcm2835 clocks	Boris Brezillon	1	-4/+63
2016-12-09	clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk	Boris Brezillon	1	-1/+3
2016-11-23	clk: bcm2835: Fix ->fixed_divider of pllh_aux	Boris Brezillon	1	-1/+1
2016-10-18	clk: bcm2835: Clamp the PLL's requested rate to the hardware limits.	Eric Anholt	1	-7/+4
2016-09-15	clk: bcm2835: Migrate to clk_hw based registration and OF APIs	Stephen Boyd	1	-39/+46
2016-09-07	clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent	Eric Anholt	1	-0/+23
2016-09-07	clk: bcm2835: Mark the CM SDRAM clock's parent as critical	Eric Anholt	1	-0/+25
2016-09-07	clk: bcm2835: Mark GPIO clocks enabled at boot as critical	Eric Anholt	1	-1/+9
2016-09-07	clk: bcm2835: Mark the VPU clock as critical	Eric Anholt	1	-1/+4
2016-04-20	clk: bcm2835: Fix PLL poweron	Eric Anholt	1	-0/+4
2016-04-20	clk: bcm2835: Fix compiler warnings on 64-bit builds	Eric Anholt	1	-4/+4
2016-03-17	clk: bcm2835: add missing osc and per clocks	Martin Sperl	1	-0/+90
2016-03-17	clk: bcm2835: add missing PLL clock dividers	Martin Sperl	1	-0/+32
2016-03-17	clk: bcm2835: enable management of PCM clock	Martin Sperl	1	-0/+7
2016-03-17	clk: bcm2835: reorganize bcm2835_clock_array assignment	Martin Sperl	1	-459/+393
2016-03-17	clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driver	Martin Sperl	1	-73/+94
2016-03-17	clk: bcm2835: expose raw clock-registers via debugfs	Martin Sperl	1	-0/+101
2016-03-17	clk: bcm2835: clean up coding style issues	Martin Sperl	1	-6/+2
2016-03-17	clk: bcm2835: correctly enable fractional clock support	Martin Sperl	1	-6/+39
2016-03-17	clk: bcm2835: divider value has to be 1 or more	Martin Sperl	1	-2/+3
2016-03-17	clk: bcm2835: add locking to pll*_on/off methods	Martin Sperl	1	-0/+4
2016-03-17	clk: bcm2835: pll_off should only update CM_PLL_ANARST	Martin Sperl	1	-2/+8
2016-03-03	clk: bcm: Remove CLK_IS_ROOT	Stephen Boyd	1	-6/+3
2016-02-26	clk: bcm2835: added missing clock register definitions	Martin Sperl	1	-0/+13
2016-02-16	clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()	Eric Anholt	1	-11/+2
2016-02-16	clk: bcm2835: Fix setting of PLL divider clock rates	Eric Anholt	1	-5/+7
2015-12-25	clk: bcm2835: Add PWM clock support	Remi Pommarel	1	-0/+13
2015-12-25	clk: bcm2835: Support for clock parent selection	Remi Pommarel	1	-45/+77
2015-12-25	clk: bcm2835: add a round up ability to the clock divisor	Remi Pommarel	1	-10/+12
2015-10-12	clk: bcm2835: Add support for programming the audio domain clocks	Eric Anholt	1	-1/+1521
2015-10-02	clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.	Eric Anholt	1	-0/+55