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path: root/drivers/clk/bcm
AgeCommit message (Expand)AuthorFilesLines
2022-01-27clk: bcm-2835: Remove rounding up the dividersMaxime Ripard1-8/+3
2022-01-27clk: bcm-2835: Pick the closest clock rateMaxime Ripard1-1/+1
2021-08-06clk: bcm2835: Switch to clk_divider.determine_rateMartin Blumenstingl1-5/+4
2021-03-22clk: bcm: rpi: Release firmware handle on unbindNicolas Saenz Julienne1-1/+1
2021-02-11clk: bcm: clk-iproc-pll: Demote kernel-doc abuseLee Jones1-1/+1
2020-12-19clk: bcm: dvp: Add MODULE_DEVICE_TABLE()Nicolas Saenz Julienne1-0/+1
2020-12-19clk: bcm: dvp: drop a variable that is assigned to onlyUwe Kleine-König1-2/+1
2020-10-22Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2-1/+4
2020-10-14clk: bcm2835: add missing release if devm_clk_hw_register failsNavid Emamdoost1-1/+3
2020-09-22clk: bcm: rpi: Add register to control pixel bvb clkHoegeun Kwon1-0/+1
2020-09-10clk: bcm: dvp: Select the reset frameworkMaxime Ripard1-0/+1
2020-08-04Merge branches 'clk-actions', 'clk-rockchip', 'clk-iproc', 'clk-intel' and 'c...Stephen Boyd1-2/+2
2020-08-04clk: bcm2835: Do not use prediv with bcm2711's PLLsNicolas Saenz Julienne1-4/+21
2020-07-24clk: iproc: round clock rate to the closestLori Hikichi1-2/+2
2020-06-26clk: bcm: dvp: Add missing module informationsMaxime Ripard1-0/+4
2020-06-20clk: bcm: rpi: Remove the quirks for the CPU clockMaxime Ripard1-164/+0
2020-06-20clk: bcm2835: Don't cache the PLLB rateMaxime Ripard1-2/+3
2020-06-20clk: bcm2835: Allow custom CCF flags for the PLLsMaxime Ripard1-1/+2
2020-06-20Revert "clk: bcm2835: remove pllb"Maxime Ripard1-4/+26
2020-06-20clk: bcm: rpi: Give firmware clocks a nameMaxime Ripard1-1/+20
2020-06-20clk: bcm: rpi: Discover the firmware clocksMaxime Ripard1-12/+141
2020-06-20clk: bcm: rpi: Add an enum for the firmware clocksMaxime Ripard1-4/+19
2020-06-20clk: bcm: rpi: Add DT provider for the clocksMaxime Ripard1-0/+16
2020-06-20clk: bcm: rpi: Make the PLLB registration function return a clk_hwMaxime Ripard1-22/+24
2020-06-20clk: bcm: rpi: Split pllb clock hooksMaxime Ripard1-8/+22
2020-06-20clk: bcm: rpi: Rename is_prepared functionMaxime Ripard1-2/+2
2020-06-20clk: bcm: rpi: Pass the clocks data to the firmware functionMaxime Ripard1-15/+14
2020-06-20clk: bcm: rpi: Add clock id to dataMaxime Ripard1-9/+9
2020-06-20clk: bcm: rpi: Create a data structure for the clocksMaxime Ripard1-10/+21
2020-06-20clk: bcm: rpi: Use CCF boundaries instead of rolling our ownMaxime Ripard1-10/+8
2020-06-20clk: bcm: rpi: Make sure the clkdev lookup is removedMaxime Ripard1-2/+3
2020-06-20clk: bcm: rpi: Switch to clk_hw_register_clkdevMaxime Ripard1-6/+5
2020-06-20clk: bcm: rpi: Remove pllb_arm_lookup global pointerMaxime Ripard1-4/+4
2020-06-20clk: bcm: rpi: Make sure pllb_arm is removedMaxime Ripard1-2/+1
2020-06-20clk: bcm: rpi: Remove global pllb_arm clock pointerMaxime Ripard1-4/+3
2020-06-20clk: bcm: rpi: Use clk_hw_register for pllb_armMaxime Ripard1-6/+18
2020-06-20clk: bcm: rpi: Statically init clk_init_dataMaxime Ripard1-2/+1
2020-06-20clk: bcm: rpi: Allow the driver to be probed by DTMaxime Ripard1-2/+17
2020-06-20clk: bcm: Add BCM2711 DVP driverMaxime Ripard3-0/+132
2020-06-20clk: bcm63xx-gate: switch to dt-bindings definitionsÁlvaro Fernández Rojas1-141/+439
2020-06-20clk: bcm63xx-gate: add BCM6318 supportÁlvaro Fernández Rojas1-0/+44
2020-06-20clk: bcm63xx-gate: fix last clock availabilityÁlvaro Fernández Rojas1-0/+1
2020-05-27clk: bcm2835: Constify struct debugfs_reg32Rikard Falkeborn1-3/+3
2020-05-27clk: bcm2835: Remove casting to bcm2835_clk_registerNathan Chancellor1-31/+37
2020-05-27clk: bcm2835: Fix return type of bcm2835_register_gateNathan Chancellor1-5/+5
2019-10-17clk: bcm2835: use devm_platform_ioremap_resource() to simplify codeYueHaibing2-6/+2
2019-09-20Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and ...Stephen Boyd1-18/+120
2019-09-17clk: bcm2835: Mark PLLD_PER as CRITICALStefan Wahren1-1/+6
2019-09-17clk: bcm2835: Add BCM2711_CLOCK_EMMC2 supportStefan Wahren1-1/+19
2019-09-17clk: bcm2835: Introduce SoC specific clock registrationStefan Wahren1-17/+96