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BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
actions
Age
Commit message (
Expand
)
Author
Files
Lines
2019-09-20
Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and ...
Stephen Boyd
1
-4
/
+3
2019-09-17
clk: actions: Fix factor clk struct member access
Manivannan Sadhasivam
1
-4
/
+3
2019-08-16
clk: actions: Don't reference clk_init_data after registration
Stephen Boyd
1
-2
/
+3
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
2
-0
/
+2
2019-05-01
clk: actions: Use the correct style for SPDX License Identifier
Nishad Kamdar
9
-9
/
+9
2019-02-22
clk: actions: Add clock driver for S500 SoC
Manivannan Sadhasivam
3
-0
/
+531
2019-02-22
clk: actions: Add configurable PLL delay
Manivannan Sadhasivam
2
-7
/
+25
2018-10-17
clk: actions: Add Actions Semi S900 SoC Reset Management Unit support
Manivannan Sadhasivam
1
-0
/
+82
2018-10-17
clk: actions: Add Actions Semi S700 SoC Reset Management Unit support
Manivannan Sadhasivam
1
-0
/
+51
2018-10-17
clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support
Manivannan Sadhasivam
5
-0
/
+101
2018-10-17
clk: actions: Cache regmap info in private clock descriptor
Manivannan Sadhasivam
4
-6
/
+8
2018-07-26
clk: actions: Add S700 SoC clock support
Saravanan Sekar
3
-0
/
+613
2018-07-26
clk: actions: Add missing REGMAP_MMIO dependency
Saravanan Sekar
1
-0
/
+1
2018-04-07
clk: actions: Add S900 SoC clock support
Manivannan Sadhasivam
3
-0
/
+734
2018-04-07
clk: actions: Add pll clock support
Manivannan Sadhasivam
3
-0
/
+287
2018-04-07
clk: actions: Add composite clock support
Manivannan Sadhasivam
3
-0
/
+324
2018-04-07
clk: actions: Add fixed factor clock support
Manivannan Sadhasivam
1
-0
/
+28
2018-04-07
clk: actions: Add factor clock support
Manivannan Sadhasivam
3
-0
/
+306
2018-04-07
clk: actions: Add divider clock support
Manivannan Sadhasivam
3
-0
/
+170
2018-04-07
clk: actions: Add mux clock support
Manivannan Sadhasivam
3
-0
/
+122
2018-04-07
clk: actions: Add gate clock support
Manivannan Sadhasivam
3
-0
/
+151
2018-04-07
clk: actions: Add common clock driver support
Manivannan Sadhasivam
4
-0
/
+137