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path: root/arch/x86/kernel/cpu/perf_event_intel.c
AgeCommit message (Expand)AuthorFilesLines
2016-01-29perf/x86: De-obfuscate codePeter Zijlstra1-3/+1
2016-01-29perf/x86: Fix uninitialized value usagePeter Zijlstra1-1/+2
2016-01-06perf/x86/intel: Add perf core PMU support for Intel Knights LandingHarish Chegondi1-0/+62
2016-01-06perf/x86: Enable cycles:pp for Intel AtomStephane Eranian1-0/+1
2016-01-06perf/x86: Use INST_RETIRED.PREC_DIST for cycles: pppAndi Kleen1-4/+46
2016-01-06perf/x86: Use INST_RETIRED.TOTAL_CYCLES_PS for cycles:pp for SkylakeAndi Kleen1-1/+1
2015-12-06Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar1-1/+1
2015-12-06perf/x86/intel: Make L1D_PEND_MISS.FB_FULL not constrained on HaswellYuanfang Chen1-1/+1
2015-11-23perf/x86: Handle multiple umask bits for BDW CYCLE_ACTIVITY.*Andi Kleen1-1/+1
2015-09-18perf/x86/intel: Fix Skylake FRONTEND MSR extrareg maskAndi Kleen1-1/+5
2015-09-18perf/x86/intel/pebs: Add PEBS frontend profiling for SkylakeAndi Kleen1-1/+10
2015-09-18perf/x86/intel: Make the CYCLE_ACTIVITY.* constraint on Broadwell more specificAndi Kleen1-1/+1
2015-09-17Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-1/+4
2015-09-13perf/x86/intel: Fix constraint accessPeter Zijlstra1-1/+4
2015-09-05watchdog: rename watchdog_suspend() and watchdog_resume()Ulrich Obergfell1-2/+2
2015-09-05watchdog: use suspend/resume interface in fixup_ht_bug()Ulrich Obergfell1-2/+5
2015-09-05kernel/watchdog: move NMI function header declarations from watchdog.h to nmi.hGuenter Roeck1-1/+1
2015-08-12Merge branch 'perf/urgent' into perf/core, to pick up fixes before applying n...Ingo Molnar1-7/+16
2015-08-12perf/x86/intel: Fix memory leak on hot-plug allocation failPeter Zijlstra1-7/+16
2015-08-04perf/x86/intel: Use 0x11 as extra reg test valueAndi Kleen1-1/+1
2015-08-04perf/x86/intel: Add Intel Skylake PMU supportAndi Kleen1-0/+232
2015-08-04perf/x86/intel: Move PMU ACK to after LBR readAndi Kleen1-1/+1
2015-08-04perf/x86/intel: Handle new arch perfmon v4 status bitsAndi Kleen1-6/+7
2015-08-04perf/x86/intel/lbr: Allow time stamp for free running PEBSv3Andi Kleen1-1/+14
2015-08-04perf/x86/intel: Fix SLM MSR_OFFCORE_RSP1 valid_maskKan Liang1-6/+10
2015-06-23Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-3/+3
2015-06-23Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-6/+8
2015-06-19perf/x86: Honor the architectural performance monitoring versionPalik, Imre1-6/+6
2015-06-19perf/x86: Add more Broadwell model numbersAndi Kleen1-0/+2
2015-06-07perf/x86/intel: Drain the PEBS buffer during context switchesYan, Zheng1-1/+10
2015-06-07perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interru...Yan, Zheng1-1/+4
2015-06-07perf/x86/intel: Use the PEBS auto reload mechanism when possibleYan, Zheng1-2/+6
2015-05-27sched/topology: Rename topology_thread_cpumask() to topology_sibling_cpumask()Bartosz Golaszewski1-3/+3
2015-05-27perf/x86/intel: Simplify put_exclusive_constraints()Peter Zijlstra1-14/+15
2015-05-27perf/x86/intel: Remove intel_excl_states::init_statePeter Zijlstra1-20/+2
2015-05-27perf/x86/intel: Remove pointless testsPeter Zijlstra1-10/+4
2015-05-27perf/x86/intel: Clean up intel_commit_scheduling() placementPeter Zijlstra1-30/+30
2015-05-27perf/x86/intel: Make WARN()ings consistentPeter Zijlstra1-11/+7
2015-05-27perf/x86/intel: Simplify the dynamic constraint code somewhatPeter Zijlstra1-11/+10
2015-05-27perf/x86/intel: Add lockdep assertPeter Zijlstra1-2/+1
2015-05-27perf/x86/intel: Correct local vs remote sibling statePeter Zijlstra1-46/+33
2015-05-27perf/x86: Improve HT workaround GP counter constraintPeter Zijlstra1-20/+10
2015-05-27perf/x86: Fix event/group validationPeter Zijlstra1-11/+4
2015-05-08perf/x86/intel: Fix SLM cache event listKan Liang1-4/+3
2015-04-22perf/x86/intel: Add cpu_(prepare|starting|dying) for core_pmuJiri Olsa1-28/+38
2015-04-17perf/x86/intel: Add Broadwell support for the LBR callstackKan Liang1-1/+1
2015-04-02perf/x86/intel: Streamline LBR MSR handling in PMIAndi Kleen1-5/+18
2015-04-02perf/x86/intel: Reset more state in PMU resetAndi Kleen1-0/+12
2015-04-02perf/x86/intel: Make the HT bug workaround conditional on HT enabledStephane Eranian1-21/+74
2015-04-02perf/x86/intel: Limit to half counters when the HT workaround is enabled, to ...Stephane Eranian1-2/+20
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