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path: root/arch/x86/kernel/cpu/mcheck/mce_amd.c
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2017-03-31x86/mce/AMD: Give a name to MCA bank 3 when accessed with legacy MSRsYazen Ghannam1-1/+1
2017-02-28Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-2/+2
2017-01-24x86/ras: Flip the TSC-adding logicBorislav Petkov1-1/+2
2017-01-24x86/ras/amd: Make sysfs names of banks more user-friendlyYazen Ghannam1-1/+5
2017-01-05x86/irq, trace: Add __irq_entry annotation to x86's platform IRQ handlersDaniel Bristot de Oliveira1-2/+2
2016-12-27x86/mce/AMD: Make the init code more robustThomas Gleixner1-0/+3
2016-12-13Merge branch 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-42/+42
2016-12-13Merge branch 'x86-idle-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-1/+0
2016-12-09x86: Remove empty idle.h headerThomas Gleixner1-1/+0
2016-11-22x86/mce/AMD: Add system physical address translation for AMD Fam17hYazen Ghannam1-0/+200
2016-11-21x86/MCE/AMD: Fix thinko about thresholding_enBorislav Petkov1-2/+3
2016-11-16x86/mce/AMD: Reset Threshold Limit after logging errorYazen Ghannam1-0/+6
2016-11-16x86/mcheck: Split threshold_cpu_callback into two callbacksSebastian Andrzej Siewior1-23/+15
2016-11-16x86/mcheck: Be prepared for a rollback back to the ONLINE stateSebastian Andrzej Siewior1-0/+4
2016-11-16x86/mcheck: Explicit cleanup on failure in mce_amdSebastian Andrzej Siewior1-2/+5
2016-11-16x86/mcheck: Move threshold_create_device()Sebastian Andrzej Siewior1-25/+25
2016-11-08x86/RAS: Hide SMCA bank namesBorislav Petkov1-3/+29
2016-11-08x86/RAS: Rename smca_bank_names to smca_namesBorislav Petkov1-3/+3
2016-11-08x86/RAS: Simplify SMCA HWID descriptor structBorislav Petkov1-15/+9
2016-11-08x86/RAS: Simplify SMCA bank descriptor structBorislav Petkov1-5/+5
2016-09-13x86/mce/AMD: Extract the error address on SMCA systemsYazen Ghannam1-1/+12
2016-09-13x86/mce/AMD: Save MCA_IPID in MCE struct on SMCA systemsYazen Ghannam1-2/+6
2016-09-13x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on SMCA systemsYazen Ghannam1-0/+14
2016-09-13x86/mce/AMD: Update sysfs bank names for SMCA systemsYazen Ghannam1-2/+47
2016-09-13x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP typesYazen Ghannam1-25/+79
2016-09-13x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocksYazen Ghannam1-9/+8
2016-09-13x86/mce: Add support for new MCA_SYND registerYazen Ghannam1-0/+3
2016-09-13x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()Yazen Ghannam1-1/+1
2016-07-08x86/mce/AMD: Increase size of the bank_map typeAravind Gopalakrishnan1-1/+1
2016-05-12x86/mce/AMD: Save an indentation level in prepare_threshold_block()Borislav Petkov1-40/+38
2016-05-12x86/mce/AMD: Disable LogDeferredInMcaStat for SMCA systemsYazen Ghannam1-9/+29
2016-05-12x86/mce/AMD: Log Deferred Errors using SMCA MCA_DE{STAT,ADDR} registersYazen Ghannam1-8/+24
2016-05-03x86/mce: Detect and use SMCA-specific msr_opsYazen Ghannam1-5/+5
2016-03-08x86/mce/AMD: Document some functionalityAravind Gopalakrishnan1-5/+2
2016-03-08x86/mce/AMD: Fix logic to obtain block addressAravind Gopalakrishnan1-29/+55
2016-03-08x86/mce/AMD, EDAC: Enable error decoding of Scalable MCA errorsAravind Gopalakrishnan1-0/+29
2016-02-01x86/mce/AMD: Set MCAX Enable bitAravind Gopalakrishnan1-0/+14
2016-02-01x86/mce/AMD: Carve out threshold block preparationBorislav Petkov1-38/+49
2016-02-01x86/mce/AMD: Fix LVT offset configuration for thresholdingAravind Gopalakrishnan1-1/+26
2016-02-01x86/mce/AMD: Reduce number of blocks scanned per bankAravind Gopalakrishnan1-1/+1
2016-02-01x86/mce/AMD: Do not perform shared bank check for future processorsAravind Gopalakrishnan1-0/+7
2015-05-07x86/mce/amd: Zap changelogBorislav Petkov1-10/+2
2015-05-07x86/mce/amd: Rename setup_APIC_mceAravind Gopalakrishnan1-2/+2
2015-05-07x86/mce/amd: Introduce deferred error interrupt handlerAravind Gopalakrishnan1-0/+93
2015-05-06x86/mce/amd: Collect valid address before logging an errorAravind Gopalakrishnan1-1/+4
2015-05-06x86/mce/amd: Factor out logging mechanismAravind Gopalakrishnan1-10/+23
2015-02-19x86/MCE/AMD: Enable thresholding interrupts by default if supportedAravind Gopalakrishnan1-2/+7
2015-02-19x86/MCE/AMD: Drop bogus const modifier from AMD's bank4_names()Jan Beulich1-1/+1
2014-11-01x86, MCE, AMD: Assign interrupt handler only when bank supports itChen Yucong1-7/+10
2014-10-22x86, MCE, AMD: Drop software-defined bank in error thresholdingBorislav Petkov1-3/+2