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BMC/Intel-BMC/linux.git
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dev-4.4
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dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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cache-sh5.c
Age
Commit message (
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)
Author
Files
Lines
2009-09-01
Revert "sh: Kill off now redundant local irq disabling."
Paul Mundt
1
-6
/
+23
2009-08-21
sh: Kill off now redundant local irq disabling.
Paul Mundt
1
-23
/
+6
2009-08-21
sh: Make cache flushers SMP-aware.
Paul Mundt
1
-23
/
+41
2009-08-15
sh64: Kill off dead i/d-cache disabled bits.
Paul Mundt
1
-12
/
+0
2009-08-15
sh: Fix up the SH-5 build with caches enabled.
Paul Mundt
1
-228
/
+21
2009-08-15
sh: Migrate SH-4 cacheflush ops to function pointers.
Paul Mundt
1
-0
/
+4
2009-08-15
sh: Kill off unused flush_icache_user_range().
Paul Mundt
1
-1
/
+1
2009-08-15
sh: Centralize the CPU cache initialization routines.
Paul Mundt
1
-1
/
+1
2009-08-15
sh: Provide the kmap_coherent() interface generically.
Paul Mundt
1
-0
/
+15
2009-08-14
sh64: Wire up the shared __flush_xxx_region() flushers.
Paul Mundt
1
-48
/
+0
2009-07-27
sh: Use the now generic SH-4 clear/copy page ops for all MMU platforms.
Paul Mundt
1
-0
/
+17
2009-05-09
sh: Cleanup irqflags size mismatch on SH-5 build.
Paul Mundt
1
-4
/
+4
2008-05-08
sh64: Fixup the nommu build.
Paul Mundt
1
-0
/
+2
2008-02-14
sh: Get SH-5 caches working again post-unification.
Paul Mundt
1
-610
/
+411
2008-02-14
sh: Update SH-5 flush_cache_sigtramp() for API changes.
Paul Mundt
1
-3
/
+5
2008-01-28
sh: comment tidying for sh64->sh migration.
Paul Mundt
1
-9
/
+6
2008-01-28
sh: Move over SH-5 TLB and cache support code.
Paul Mundt
1
-0
/
+1032