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BMC/Intel-BMC/linux.git
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dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
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arch
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sh
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include
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cpu-sh2a
/
cpu
Age
Commit message (
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)
Author
Files
Lines
2017-11-02
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Greg Kroah-Hartman
5
-0
/
+5
2017-10-04
sh: sh7269: remove nonexistent GPIO_PH[0-7] to fix pinctrl registration
Geert Uytterhoeven
1
-3
/
+1
2017-10-04
sh: sh7264: remove nonexistent GPIO_PH[0-7] to fix pinctrl registration
Geert Uytterhoeven
1
-3
/
+1
2014-03-04
sh: prefix sh-specific "CCR" and "CCR2" by "SH_"
Geert Uytterhoeven
1
-2
/
+2
2012-08-09
sh: sh7269: Fix LCD pinmux
Phil Edworthy
1
-12
/
+24
2012-06-13
sh: Kill off last dead UBC header
Paul Bolle
1
-28
/
+0
2012-05-19
sh: Tidy up some of the cpu legacy dma header mess.
Paul Mundt
1
-1
/
+0
2012-05-10
sh: Add pinmux for sh7269
Phil Edworthy
1
-0
/
+201
2012-05-10
sh: Add pinmux for sh7264
Phil Edworthy
1
-0
/
+176
2009-08-15
sh: Convert SH-2A to new cacheflush interface.
Paul Mundt
1
-30
/
+0
2009-08-15
sh: Kill off unused flush_icache_user_range().
Paul Mundt
1
-1
/
+0
2009-08-15
sh: consolidate flush_dcache_mmap_lock/unlock() definitions.
Paul Mundt
1
-2
/
+0
2009-08-15
sh: Centralize the CPU cache initialization routines.
Paul Mundt
1
-1
/
+0
2009-05-08
sh: Fix UBC setup and registers for SH2A
Kieran Bingham
1
-1
/
+28
2008-10-20
sh: Move the CPU definition headers from asm/ to cpu/.
Paul Mundt
1
-0
/
+143
2008-08-04
SH2(A) cache update
Yoshinori Sato
2
-0
/
+37
2008-08-04
add addrespace definition for sh2a.
Takashi Yoshii
1
-0
/
+10
2008-07-29
sh: Provide common CPU headers, prune the SH-2 and SH-2A directories.
Paul Mundt
7
-200
/
+3
2008-07-29
sh: migrate to arch/sh/include/
Paul Mundt
10
-0
/
+264