BMC/Intel-BMC/linux.git - Intel OpenBMC Linux kernel source tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2020-12-11	riscv: kernel: Drop unused clean rule	Kefeng Wang	1	-2/+0
2020-10-03	RISC-V: Add EFI runtime services	Atish Patra	1	-0/+2
2020-08-20	RISC-V: Remove CLINT related code from timer and arch	Anup Patel	1	-1/+1
2020-07-30	riscv: Add jump-label implementation	Emil Renner Berthing	1	-0/+2
2020-05-18	riscv: Add KGDB support	Vincent Chen	1	-0/+1
2020-05-13	riscv: perf: RISCV_BASE_PMU should be independent	Kefeng Wang	1	-1/+1
2020-04-03	riscv: Add SOC early init support	Damien Le Moal	1	-0/+1
2020-04-03	riscv: Unaligned load/store handling for M_MODE	Damien Le Moal	1	-1/+1
2020-03-31	RISC-V: Support cpu hotplug	Atish Patra	1	-0/+1
2020-03-31	RISC-V: Add supported for ordered booting method using HSM	Atish Patra	1	-0/+3
2020-03-31	RISC-V: Add cpu_ops and modify default booting method	Atish Patra	1	-0/+2
2020-03-26	riscv: introduce interfaces to patch kernel code	Zong Li	1	-1/+3
2019-11-18	riscv: add nommu support	Christoph Hellwig	1	-2/+1
2019-11-18	riscv: provide native clint access for M-mode	Christoph Hellwig	1	-0/+1
2019-11-14	riscv: cleanup the default power off implementation	Christoph Hellwig	1	-0/+1
2019-09-05	riscv: Add support for perf registers sampling	Mao Han	1	-0/+1
2019-09-04	riscv: Add perf callchain support	Mao Han	1	-1/+2
2019-05-21	treewide: Add SPDX license identifier - Makefile/Kconfig	Thomas Gleixner	1	-0/+1
2019-03-27	RISC-V: Always compile mm/init.c with cmodel=medany and notrace	Anup Patel	1	-3/+0
2018-10-23	Allow to disable FPU support	Alan Kao	1	-1/+1
2018-10-23	Extract FPU context operations from entry.S	Alan Kao	1	-0/+1
2018-06-05	perf: riscv: preliminary RISC-V support	Alan Kao	1	-0/+2
2018-04-03	RISC-V: Fixes to module loading	Palmer Dabbelt	1	-0/+1
2018-04-03	RISC-V: Add sections of PLT and GOT for kernel module	Zong Li	1	-0/+1
2018-04-03	riscv/ftrace: Add dynamic function tracer support	Alan Kao	1	-2/+3
2018-01-31	riscv/ftrace: Add basic support	Alan Kao	1	-0/+7
2017-09-27	RISC-V: Build Infrastructure	Palmer Dabbelt	1	-0/+33