| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2012-09-05 | powerpc/booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int | Mihai Caraman | 1 | -2/+3 |
| 2012-09-05 | powerpc/booke64: Use GSRR registers in Guest Doorbell interrupts | Mihai Caraman | 1 | -0/+1 |
| 2011-06-29 | powerpc/book3e-64: use a separate TLB handler when linear map is bolted | Scott Wood | 1 | -18/+34 |
| 2009-08-28 | powerpc/book3e-64: Add helper function to setup IVORs | Kumar Gala | 1 | -0/+4 |
| 2009-08-20 | powerpc: Add definitions used by exception handling on 64-bit Book3E | Benjamin Herrenschmidt | 1 | -0/+201 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |