| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-11-03 | openrisc: add tick timer multi-core sync logic | Stafford Horne | 1 | -0/+8 |
| 2017-11-03 | openrisc: initial SMP support | Stefan Kristiansson | 1 | -0/+15 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |