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BMC/Intel-BMC/linux.git
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dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
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arch
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nios2
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mm
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tlb.c
Age
Commit message (
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)
Author
Files
Lines
2020-06-09
mm: don't include asm/pgtable.h if linux/mm.h is already included
Mike Rapoport
1
-1
/
+0
2019-03-07
nios2: Fix update_mmu_cache preload the TLB with the new PTE
Nicholas Piggin
1
-1
/
+2
2019-03-07
nios2: update_mmu_cache preload the TLB with the new PTE
Nicholas Piggin
1
-6
/
+26
2019-03-07
nios2: User address TLB flush break after finding the matching entry
Nicholas Piggin
1
-0
/
+5
2019-03-07
nios2: flush_tlb_all use TLBMISC way auto-increment feature
Nicholas Piggin
1
-6
/
+5
2019-03-07
nios2: improve readability of tlb functions
Nicholas Piggin
1
-27
/
+33
2019-03-07
nios2: flush_tlb_mm flush only the pid
Nicholas Piggin
1
-12
/
+14
2019-03-07
nios2: flush_tlb_pid can just restore TLBMISC once
Nicholas Piggin
1
-2
/
+2
2019-03-07
nios2: TLBMISC writes do not require PID bits to be set
Nicholas Piggin
1
-12
/
+7
2019-03-07
nios2: Use an invalid TLB entry address helper function
Nicholas Piggin
1
-35
/
+33
2019-03-07
nios2: flush_tlb_page use PID based flush
Nicholas Piggin
1
-9
/
+9
2014-12-08
nios2: TLB handling
Ley Foon Tan
1
-0
/
+275