index
:
BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
mips
/
oprofile
/
op_model_loongson2.c
Age
Commit message (
Expand
)
Author
Files
Lines
2013-02-01
MIPS: Whitespace cleanup.
Ralf Baechle
1
-5
/
+5
2010-07-05
MIPS: Oprofile: Fixup of loongson2_exit()
Wu Zhangjin
1
-1
/
+7
2010-05-22
MIPS: Oprofile: Loongson: Cleanup the comments
Wu Zhangjin
1
-20
/
+5
2010-05-22
MIPS: Oprofile: Loongson: Cleanup of the macros
Wu Zhangjin
1
-11
/
+11
2010-05-22
MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
Wu Zhangjin
1
-4
/
+1
2010-05-22
MIPS: Oprofile: Loongson: Remove useless parentheses
Wu Zhangjin
1
-1
/
+1
2010-05-22
MIPS: Oprofile: Loongson: Unify macro for setting events
Wu Zhangjin
1
-4
/
+4
2010-05-16
MIPS: Oprofile: Fix Loongson irq handler
Wu Zhangjin
1
-1
/
+1
2010-02-27
MIPS: Loongson: Remove pointless sample_lock from oprofile code.
Ralf Baechle
1
-7
/
+0
2010-02-27
MIPS: Make various locks static.
Ralf Baechle
1
-1
/
+1
2010-02-27
MIPS: Loongson: Change the Email address of Wu Zhangjin
Wu Zhangjin
1
-1
/
+1
2009-12-17
MIPS: oprofile: Only do performance counter handling for counter interrupts
Wu Zhangjin
1
-1
/
+4
2009-11-02
MIPS: Oprofile: Rename cpu_type from godson2 to loongson2
Wu Zhangjin
1
-1
/
+1
2009-09-30
MIPS: Loongson2: Fix typo "enalbe" -> "enable"
Uwe Kleine-König
1
-7
/
+7
2009-09-17
MIPS: Loongson: Add oprofile support
Wu Zhangjin
1
-0
/
+177