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AgeCommit message (Expand)AuthorFilesLines
2005-10-29Protect manipulation of c0_status against preemption and multithreading.Ralf Baechle2-12/+47
2005-10-29Detect 4KSD and treat it like 4KSc.Ralf Baechle1-0/+1
2005-10-29Define and initialize kdb_lock using DEFINE_SPINLOCK.Ralf Baechle1-6/+8
2005-10-29Make kgdb_wait static.Ralf Baechle1-1/+1
2005-10-29Cleanup the mess in cpu_cache_init.Ralf Baechle1-7/+18
2005-10-29Support for MIPSsim, the cycle accurate MIPS simulator.Ralf Baechle1-1/+1
2005-10-29Switch Sibyte profiling driver to ->compat_ioctlRalf Baechle1-6/+0
2005-10-29Revise MIPS 64-bit ptrace interfaceDaniel Jacobowitz3-1/+211
2005-10-29Fix excessive signal latencies.Ralf Baechle1-1/+1
2005-10-29Move genrtc.c's functions into <asm/rtc.h>Ralf Baechle2-66/+0
2005-10-29Virtual SMP support for the 34K.Ralf Baechle5-7/+391
2005-10-29MT bulletproofing.Ralf Baechle2-14/+75
2005-10-29Display presence of SmartMIPS, DSP and MT ASEs in /proc/cpuinfo.Ralf Baechle1-2/+5
2005-10-29Delete old junk.Ralf Baechle1-1/+0
2005-10-29Spelling fix.Ralf Baechle1-1/+1
2005-10-29Inlining will result in back-to-back mtc0 mfc0 instructions. Break theRalf Baechle1-0/+2
2005-10-29sys is only used for native o32 ...Ralf Baechle1-3/+3
2005-10-29R4600 has 32 FPRs.Thiemo Seufer1-1/+2
2005-10-29Make sure that the processor is actually online or die spectacularly.Ralf Baechle1-0/+5
2005-10-29Avoid SMP cacheflushes. This is a minor optimization of startup butRalf Baechle1-0/+2
2005-10-29Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov3-1/+24
2005-10-29More AP / SP bits for the 34K, the Malta bits and things. Still wantsRalf Baechle6-17/+1890
2005-10-29Move Origin crapola into a machine-specific header file.Ralf Baechle1-37/+6
2005-10-29Prevent gcc from optimizing a few functions away completly.Ralf Baechle1-2/+2
2005-10-29Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle1-0/+6
2005-10-29New kernel option nowait allows disabling the use of the wait instruction.Ralf Baechle1-0/+16
2005-10-29Use an irq_enable_hazard hazard barrier in unmask_mips_irq. ThisRalf Baechle1-0/+2
2005-10-29Add inotify syscalls for MIPS.Ralf Baechle4-1/+12
2005-10-29Mark a few variables __read_mostly.Ralf Baechle2-7/+11
2005-10-29Detect the 34K.Ralf Baechle2-0/+6
2005-10-29Setup_frame is now returning a success value.Ralf Baechle4-25/+32
2005-10-29Temporary hack for Qemu and MIPSsim until they get a proper ELF loader.Ralf Baechle1-0/+12
2005-10-29Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle3-4/+4
2005-10-29Avoid defining variables in the middle of a block which breaks olderRalf Baechle1-4/+10
2005-10-29Always use ".set mips3" rather than select between "mips2" or "mips3"Maciej W. Rozycki1-2/+2
2005-10-29Use correct names for bits in the R3k cp0.status register.Maciej W. Rozycki1-26/+41
2005-10-29Mark __die() "noreturn" for real.Maciej W. Rozycki1-2/+3
2005-10-29Redo RM9000 workaround which along with other DSP ASE changes wasRalf Baechle4-57/+84
2005-10-29Enable a suitable ISA for the assembler around ll/sc so that codeMaciej W. Rozycki1-4/+8
2005-10-29For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style)Maciej W. Rozycki1-5/+1
2005-10-29Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle14-82/+308
2005-10-2964-bit fixes for Alchemy code ;)Ralf Baechle1-6/+5
2005-10-29Fix tasteless #ifdef mess in audit_arch(), minor cleanups.Ralf Baechle1-17/+12
2005-10-29__compute_return_epc() uses CFC1 instruction which might result in aRalf Baechle1-3/+7
2005-10-29sys_nfsservctl() needs translation.Maciej W. Rozycki1-1/+1
2005-10-29No point in checking cpu_has_tlb before we've computed the CPU options.Ralf Baechle1-4/+4
2005-10-29Cleanup decoding of MIPSxx config registers.Ralf Baechle2-44/+105
2005-10-29Fix preemption and SMP problems in the FP emulator code.Ralf Baechle1-2/+17
2005-10-29Ustat needs a wrapper on n32.Thiemo Seufer1-1/+1
2005-10-29We pass a kernel pointer to do_sigaltstack in sys32_sigaltstack, soRalf Baechle1-0/+4
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