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BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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mips
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asm
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mips-cm.h
Age
Commit message (
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Author
Files
Lines
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Thomas Gleixner
1
-5
/
+1
2017-11-01
MIPS: Fix CM region target definitions
Paul Burton
1
-2
/
+2
2017-11-01
Update MIPS email addresses
Paul Burton
1
-1
/
+1
2017-08-30
MIPS: CPS: Cluster support for topology functions
Paul Burton
1
-30
/
+0
2017-08-30
MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers
Paul Burton
1
-3
/
+4
2017-08-30
MIPS: CM: Add cluster & block args to mips_cm_lock_other()
Paul Burton
1
-9
/
+36
2017-08-30
MIPS: Abstract CPU core & VP(E) ID access through accessor functions
Paul Burton
1
-1
/
+1
2017-08-30
MIPS: CPS: Add CM/CPC 3.5 register definitions
Paul Burton
1
-5
/
+49
2017-08-29
MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts
Paul Burton
1
-181
/
+130
2017-08-29
MIPS: CM: Specify register size when generating accessors
Paul Burton
1
-109
/
+45
2017-08-29
MIPS: CM: Rename mips_cm_base to mips_gcr_base
Paul Burton
1
-3
/
+3
2017-01-03
MIPS: traps: Ensure L1 & L2 ECC checking match for CM3 systems
Paul Burton
1
-0
/
+7
2016-10-04
MIPS: pm-cps: Support CM3 changes to Coherence Enable Register
Matt Redfearn
1
-0
/
+1
2016-10-02
MIPS: CM: Fix mips_cm_max_vp_width for non-MT kernels on MT systems
Paul Burton
1
-0
/
+11
2016-08-04
tree-wide: replace config_enabled() with IS_ENABLED()
Masahiro Yamada
1
-1
/
+1
2016-05-14
MIPS: CM: Fix compilation error when !MIPS_CM
Tony Wu
1
-1
/
+1
2016-05-13
MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
Paul Burton
1
-1
/
+4
2016-05-13
MIPS: CM: Add CM GCR_BEV_BASE accessors
Paul Burton
1
-0
/
+1
2016-05-09
mips: Fix CPC_BASE_ADDR mask to match datasheet
Nikolay Martynov
1
-2
/
+2
2016-04-03
MIPS: Fix misspellings in comments.
Adam Buchbinder
1
-1
/
+1
2016-01-24
MIPS: smp-cps: Ensure secondary cores start with EVA disabled
Matt Redfearn
1
-0
/
+4
2015-11-11
MIPS: CM: Introduce core-other locking functions
Paul Burton
1
-0
/
+32
2015-11-11
MIPS: CM: Fix GCR_Cx_CONFIG PVPE mask
Paul Burton
1
-1
/
+1
2015-10-26
MIPS: Always read full 64 bit CM error GCRs for CM3
Paul Burton
1
-0
/
+3
2015-10-26
MIPS: Allow read64 GCR accessors to work on MIPS32 kernels
Paul Burton
1
-1
/
+11
2015-10-26
MIPS: Clarify mips_cm_is64 documentation
Paul Burton
1
-6
/
+6
2015-10-26
MIPS: Enable L2 prefetching for CM >= 2.5
Paul Burton
1
-0
/
+17
2015-09-27
MIPS: CM: Provide a function to map from CPU to VP ID.
Paul Burton
1
-0
/
+39
2015-08-26
MIPS: CM: Add support for reporting CM cache errors
Markos Chandras
1
-0
/
+9
2015-08-26
MIPS: mips-cm: Extend CM accessors for 64-bit CPUs
Markos Chandras
1
-4
/
+44
2015-08-26
MIPS: CM: Add GCR_L2_CONFIG register accessors
Paul Burton
1
-0
/
+11
2015-08-26
MIPS: mips-cm: Implement mips_cm_revision
Paul Burton
1
-0
/
+21
2015-06-21
MIPS: include errno.h for ENODEV in mips-cm.h
Paul Burton
1
-0
/
+1
2015-06-21
MIPS: Define GCR_GIC_STATUS register fields
Paul Burton
1
-0
/
+4
2015-01-13
MIPS: mips-cm: Fix sparse warnings
James Hogan
1
-2
/
+2
2014-11-25
MIPS: Replace use of phys_t with phys_addr_t.
Ralf Baechle
1
-1
/
+1
2014-03-31
MIPS: CM: use __raw_ memory access functions
Paul Burton
1
-2
/
+2
2014-03-07
MIPS: Add generic CM probe & access code
Paul Burton
1
-0
/
+322