summaryrefslogtreecommitdiff
path: root/arch/mips/include/asm/mach-malta
AgeCommit message (Expand)AuthorFilesLines
2020-09-21MIPS: malta: remove mach-malta/malta-dtshim.h header fileThomas Bogendoerfer1-25/+0
2020-09-21MIPS: malta: remove unused header fileThomas Bogendoerfer1-33/+0
2020-09-07MIPS: Remove mach-*/war.hThomas Bogendoerfer1-11/+0
2020-09-07MIPS: Get rid of BCM1250_M3_WARThomas Bogendoerfer1-2/+0
2020-09-07MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDSThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R10000_LLSC_WAR info a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WARThomas Bogendoerfer1-2/+0
2020-09-07MIPS: Convert R4600_V2_HIT_CACHEOP into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R4600_V1_HIT_CACHEOP into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config optionThomas Bogendoerfer1-1/+0
2020-03-19MIPS: Add header files reference with path prefixbibo mao1-1/+1
2019-07-24MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton1-1/+0
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 182Thomas Gleixner1-13/+1
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2-10/+2
2017-11-03Update MIPS email addressesPaul Burton2-2/+2
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2-0/+2
2016-05-28MIPS: Add definitions of SegCtl registers and use themMatt Redfearn1-3/+3
2015-11-11MIPS: Malta: Setup RAM regions via DTPaul Burton1-0/+29
2014-11-24irqchip: mips-gic: Probe for number of external interruptsAndrew Bresticker1-1/+0
2014-08-19MIPS: Malta: EVA: Rename 'eva_entry' to 'platform_eva_init'Markos Chandras1-6/+16
2014-08-02MIPS: GIC: Move GIC_NUM_INTRS into platform irq.hJeffrey Deans1-0/+1
2014-05-30MIPS: Malta: add suspend state entry codePaul Burton1-0/+37
2014-05-24MIPS: MT: Remove SMTC supportRalf Baechle1-30/+0
2014-03-27MIPS: malta: Add support for SMP EVAMarkos Chandras1-0/+6
2014-03-27MIPS: malta: spaces.h: Add spaces.h file for Malta (EVA)Markos Chandras1-0/+46
2014-03-27MIPS: malta: Configure Segment Control registers for EVA bootMarkos Chandras1-1/+108
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle3-6/+6
2012-12-13MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle1-1/+0
2011-07-25MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platformsShinya Kuribayashi1-0/+2
2009-09-17MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSCRalf Baechle1-4/+0
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle6-0/+225
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-29 03:16:12 +0300