index
:
BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
mips
/
include
/
asm
/
mach-cavium-octeon
/
cpu-feature-overrides.h
Age
Commit message (
Expand
)
Author
Files
Lines
2012-10-11
MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.
Ralf Baechle
1
-0
/
+1
2012-09-14
MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
Steven J. Hill
1
-1
/
+1
2011-09-24
MIPS: Octeon: Enable C0_UserLocal probing.
David Daney
1
-1
/
+0
2010-10-29
MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.
David Daney
1
-1
/
+1
2010-10-29
MIPS: Octeon: Adjust top of DMA32 zone.
David Daney
1
-0
/
+6
2010-08-05
MIPS: Octeon: Implement delays with cycle counter.
David Daney
1
-11
/
+0
2010-08-05
MIPS: Octeon: Define ARCH_HAS_USABLE_BUILTIN_POPCOUNT for OCTEON.
David Daney
1
-0
/
+8
2010-02-27
MIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUs
David Daney
1
-0
/
+3
2009-09-17
MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.
David Daney
1
-4
/
+8
2009-06-17
MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h
David Daney
1
-0
/
+1
2009-06-17
MIPS: Remove execution hazard barriers for Octeon.
David Daney
1
-0
/
+1
2009-01-11
MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.
David Daney
1
-0
/
+78