index
:
BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
arm64
/
include
/
asm
/
atomic_ll_sc.h
Age
Commit message (
Expand
)
Author
Files
Lines
2017-05-15
arm64: Remove redundant mov from LL/SC cmpxchg
Robin Murphy
1
-1
/
+0
2016-06-16
locking/atomic, arch/arm64: Implement atomic{,64}_fetch_{add,sub,and,andnot,o...
Peter Zijlstra
1
-24
/
+86
2015-11-05
arm64: cmpxchg_dbl: fix return value type
Lorenzo Pieralisi
1
-1
/
+1
2015-10-12
arm64: atomics: implement native {relaxed, acquire, release} atomics
Will Deacon
1
-38
/
+60
2015-08-04
arm64: make ll/sc __cmpxchg_case_##name asm consistent
Mark Rutland
1
-1
/
+1
2015-07-27
arm64: atomic64_dec_if_positive: fix incorrect branch condition
Will Deacon
1
-1
/
+1
2015-07-27
arm64: atomics: implement atomic{,64}_cmpxchg using cmpxchg
Will Deacon
1
-46
/
+0
2015-07-27
arm64: atomics: prefetch the destination word for write prior to stxr
Will Deacon
1
-0
/
+9
2015-07-27
arm64: cmpxchg: avoid memory barrier on comparison failure
Will Deacon
1
-26
/
+22
2015-07-27
arm64: cmpxchg: avoid "cc" clobber in ll/sc routines
Will Deacon
1
-8
/
+6
2015-07-27
arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPU
Will Deacon
1
-0
/
+34
2015-07-27
arm64: cmpxchg: patch in lse instructions when supported by the CPU
Will Deacon
1
-0
/
+38
2015-07-27
arm64: atomics: patch in lse instructions when supported by the CPU
Will Deacon
1
-12
/
+0
2015-07-27
arm64: introduce CONFIG_ARM64_LSE_ATOMICS as fallback to ll/sc atomics
Will Deacon
1
-2
/
+17
2015-07-27
arm64: atomics: move ll/sc atomics into separate header file
Will Deacon
1
-0
/
+215