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path: root/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
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2018-07-20ARM64: dts: meson-axg: add the audio clock controllerJerome Brunet1-0/+36
Add the audio clock controller which is part of the audio bus This controller takes 8 input plls, and the usual clock gate, from the main clock controller. It provides the clocs for the all the devices of the audio subsystem, such as tdms, spdif, pdm, etc. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add pdm pinsJerome Brunet1-0/+42
Add pdm input pin definitions to meson AXG Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add spdif input pinsJerome Brunet1-0/+35
Add spdif input pin definitions to meson AXG Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: remove spdif out from gpio a7Jerome Brunet1-7/+0
Spdif out in not multiplexed on gpio A7 (spdif in is) Remove this entry to fix the problem. Fixes: 53c03b0aff36 ("ARM64: dts: meson-axg: add spdif output pins") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: remove vddio_ao18 from SoC dtsiJerome Brunet1-7/+0
Regulator should not be defined inside the SoC dtsi file. vddio_ao18 is already defined in the S400 board dts anyway. Fixes: bb8a2ebd0498 ("ARM64: dts: meson-axg: add saradc support") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add saradc supportXingyu Chen1-0/+21
Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC. Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add spdif output pinsJerome Brunet1-0/+42
Add the different pin configurations for the spdif output Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-06-28ARM64: dts: meson: fix register ranges for SD/eMMCKevin Hilman1-2/+2
Based on updated information from Amlogic, correct the register range for the SD/eMMC blocks to the right size. Reported-by: Yixun Lan <yixun.lan@amlogic.com> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson: fix clock source of the pclk for UART_AOYixun Lan1-2/+2
>From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: add AO clock driverQiufang Dai1-0/+12
This add the AO (Always-On part) clock DT info for Meson-AXG SoC Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> [khilman: cleanup subject] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: add i2c AO pinsJerome Brunet1-0/+42
Add the pins related to the i2c AO controller of the meson-axg platform Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: correct i2c AO clockJerome Brunet1-1/+1
The clock specified for the i2c AO controller is the one for the EE domain, which is incorrect as this controller needs the clock for AO i2c controller. Fixes: dc6f858e2690 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: clean-up i2c nodesJerome Brunet1-23/+14
Remove undocumented and unused "clk_i2c" clock name and the second interrupt from i2c nodes of meson-axg platform. Those seems to have been copy/pasted from the vendor kernel Fixes: dc6f858e2690 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-10ARM64: dts: meson: add MMC resetsJerome Brunet1-0/+3
Add reset lines to the mmc controllers of the meson gx and axg SoCs Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-10ARM64: dts: meson-axg: add an 32K alt aoclkYixun Lan1-0/+7
The ao_clk81 in AO domain have two clock source, one from a 32K alt crystal we name it as ao_alt_clk, another is the clk81 signal from EE domain. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-10ARM64: dts: meson-axg: add tdm pinsJerome Brunet1-0/+245
Add tdm pins to amlogic's A113 device tree Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-10ARM64: dts: meson-axg: add GPIO interrupt controller supportYixun Lan1-0/+9
Add the GPIO interrupt controller driver which found in the Amlogic's Meson-AXG SoC, the controller share the similar ASIC IP as other meson SoCs. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-10ARM64: dts: meson-axg: enable the eMMC controllerNan Li1-0/+82
The IP of eMMC controller in AXG is similiar to Meson-GX series. Here we add the initial support of the HS200 mode with clock running at 166MHz (to be safe), since we found some eMMC chip fail to run at 200MHz due to tunning phase error. Signed-off-by: Nan Li <nan.li@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> [khilman: drop incorrect SDIO pwrseq property] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-04-19ARM64: dts: meson-axg: use hhi syscon for the clock controllerJerome Brunet1-4/+8
Like the meson-gx, the axg clock controller should go through a syscon to access the hhi register region, and not directly map the region. This way, the hhi register region can be used safely by multiple drivers. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-03-08ARM64: dts: amlogic: Convert to new-style SPDX license identifiersNeil Armstrong1-2/+1
Move the SPDX-License-Identifier lines to the top and drop the license splat. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-03-08ARM64: dts: meson-axg: fix pwm_AO_cd compatibleJerome Brunet1-1/+1
The compatible in pwm_AO_cd is wrong and does not match anything. Correct this with the correct compatible string Fixes: 4a81e5ddfb43 ("ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-03-08ARM64: dts: meson-axg: add sec_AO system controllerJerome Brunet1-0/+6
add the secure AO system controller with chipid enabled Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: dts: meson-axg: uart: Add the pinctrl info descriptionYixun Lan1-0/+96
Describe the pinctrl info for the UART controller which is found in the Meson-AXG SoCs. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> [khilman: s/uart_ao_b_gpioz/uart_ao_b_z/ ] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UARTYixun Lan1-2/+6
When update the clock info for the UART controller in the EE domain, the driver explicitly require 'pclk' in order to work properly. With current logic of the code, the driver will go for the legacy clock probe routine if it find current compatible string match to 'amlogic,meson-uart', which result in not requesting the 'pclk' clock, thus break the driver in the end. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: dts: meson-axg: add RMII pins for ethernet controllerYixun Lan1-0/+30
Comparing to RGMII interface, the RMII interface require few pins. So it's worth describing them here. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: dts: meson-axg: describe pin DT info for I2C controllerJian Hu1-0/+64
Describe all the pin mux for the I2C controller which found in Meson-AXG SoC. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoCJian Hu1-0/+59
There are four I2C masters in EE domain, and one I2C Master in AO domain, the DT info here should describe them all. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: meson-axg: enable hardware rngJerome Brunet1-0/+7
Enable the hardware random generator Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: dts: meson: uart: fix address space rangeYixun Lan1-2/+2
The address space range is actually 0x18, fixed here. Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-01-06ARM64: dts: meson-axg: add ethernet mac controllerYixun Lan1-0/+53
Add DT info for the stmmac ethernet MAC which found in the Amlogic's Meson-AXG SoC, also describe the ethernet pinctrl & clock information here. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-01-06ARM64: dts: meson-axg: add the SPICC controllerSunny Luo1-0/+92
Add DT info for the SPICC controller which found in the Amlogic's Meson-AXG SoC. Signed-off-by: Sunny Luo <sunny.luo@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-01-06ARM64: dts: meson-axg: enable IR controllerYixun Lan1-0/+14
Enable IR remote controller which found in Amlogic's Meson-AXG SoCs. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-01-06arm64: dts: meson-axg: switch uart_ao clock to CLK81Yixun Lan1-2/+3
Switch the uart_ao pclk to CLK81 since the clock driver is ready. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-16arm64: dts: meson-axg: add new reset DT nodeYixun Lan1-0/+6
Add reset DT node for Amlogic's Meson-AXG SoC. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-15ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoCJian Hu1-0/+112
Add PWM DT info for the Amlogic's Meson-Axg SoC. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-15ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoCXingyu Chen1-0/+43
Add new pinctrl DT info for the Amlogic's Meson-AXG SoC. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> [khilman: dropped unnecessary include] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-15arm64: dts: meson-axg: add clock DT info for Meson AXG SoCQiufang Dai1-0/+14
Try to add Hiubus DT info, and also enable clock DT info for the Amlogic's Meson-AXG SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-08ARM64: dts: amlogic: use generic bus node namesKevin Hilman1-2/+2
The DT spec recommends that node-names have generic names like "bus". Fix that in the Amlogic DTs, while leaving the label names to have more SoC-specific names that match with the HW documentation. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-30Merge tag 'amlogic-dt64' of ↵Arnd Bergmann1-0/+204
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit platforms: DT updates for v4.15" from Kevin Hilman: - new SoC support: A113D - new boards: Tronsmart Vega S96, Khadas vim2 - reserved memory fixups - gpio-names cleanups - MMC cleanups, enable high-speed modes - misc cleanups * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-axg: add initial A113D SoC DT support dt-bindings: arm: amlogic: Add Meson AXG binding ARM64: dts: meson-gx: remove unnecessary uart compatible ARM64: dts: meson-gx: remove unnecessary clocks properties ARM64: dts: meson-gxl: Add alternate ARM Trusted Firmware reserved memory zone ARM64: dts: meson-gxm: enable HS400 on the vim2 ARM64: dts: meson-gxbb-nexbox-a95x: Enable USB Nodes dt-bindings: arm: amlogic: Add Tronsmart Vega S96 binding ARM64: dts: meson-gxm: Add Vega S96 board ARM64: dts: meson-gxm: Add support for Khadas VIM2 ARM64: dts: meson-gxl: Take eMMC data strobe out of eMMC pins ARM64: dts: meson-gxl: adjust libretech-cc gpio-line-names ARM64: dts: meson-gxl: adjust kvim gpio-line-names ARM64: dts: meson-gxbb: adjust odroid-c2 gpio-line-names ARM64: dts: meson-gxbb: adjust nanopi-k2 gpio-line-names ARM64: dts: meson-gx: adjust gpio-ranges for TEST_N ARM64: dts: meson-gx: remove gpio offset ARM: dts: meson8: remove gpio offset ARM64: dts: meson-gxl-libretech-cc: enable internal phy leds ARM64: dts: meson-gxl-libretech-cc: enable saradc
2017-10-19arm64: dts: meson-axg: add initial A113D SoC DT supportYixun Lan1-0/+204
Try to add basic DT support for the Amlogic's Meson-AXG A113D SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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