| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2012-03-28 | ARM: move CP15 definitions to separate header file | Russell King | 1 | -1/+1 |
| 2010-12-19 | ARM: fix cache-xsc3l2 after stack based kmap_atomic() | Nicolas Pitre | 1 | -36/+21 |
| 2010-01-01 | [ARM] pxa: do not enable L2 after MMU is enabled | Haojian Zhuang | 1 | -6/+5 |
| 2009-03-16 | [ARM] xsc3: add highmem support to L2 cache handling code | Nicolas Pitre | 1 | -27/+80 |
| 2008-11-06 | [ARM] xsc3: fix xsc3_l2_inv_range | Dan Williams | 1 | -2/+2 |
| 2008-09-01 | [ARM] cputype: separate definitions, use them | Russell King | 1 | -1/+2 |
| 2008-07-29 | [ARM] pxa: add support for L2 outer cache on XScale3 (attempt 2) | Eric Miao | 1 | -0/+182 |
 |
index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |