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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
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arch
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arm
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mm
/
cache-v4wb.S
Age
Commit message (
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)
Author
Files
Lines
2014-07-18
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
Russell King
1
-7
/
+8
2012-09-25
ARM: mm: implement LoUIS API for cache maintenance ops
Lorenzo Pieralisi
1
-0
/
+3
2012-05-02
ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails
Will Deacon
1
-3
/
+3
2011-07-07
ARM: mm: cache-v4wb: Use the new processor struct macros
Dave Martin
1
-13
/
+2
2011-03-31
Fix common misspellings
Lucas De Marchi
1
-1
/
+1
2010-10-28
ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
Mika Westerberg
1
-0
/
+12
2010-02-15
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
Russell King
1
-4
/
+2
2010-02-15
ARM: dma-mapping: provide per-cpu type map/unmap functions
Russell King
1
-0
/
+26
2009-12-14
ARM: add size argument to __cpuc_flush_dcache_page
Russell King
1
-5
/
+6
2006-06-30
Remove obsolete #include <linux/config.h>
Jörn Engel
1
-1
/
+0
2006-04-07
[ARM] Fix SA110/SA1100 cache flushing
Russell King
1
-5
/
+21
2005-04-17
Linux-2.6.12-rc2
v2.6.12-rc2
Linus Torvalds
1
-0
/
+216