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BMC/Intel-BMC/linux.git
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dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
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dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
arm
/
mach-tegra
/
headsmp.S
Age
Commit message (
Expand
)
Author
Files
Lines
2013-07-19
ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9
Joseph Lo
1
-1
/
+2
2013-03-12
ARM: tegra: don't unlock MMIO access to DBGLAR
Joseph Lo
1
-3
/
+0
2013-02-12
Merge branch 'socfpga/hw' into next/soc
Olof Johansson
1
-43
/
+0
2013-02-12
arm: Add v7_invalidate_l1 to cache-v7.S
Dinh Nguyen
1
-43
/
+0
2013-01-28
ARM: tegra: make device can run on UP
Joseph Lo
1
-220
/
+1
2013-01-28
ARM: tegra: clean up the CPUINIT section
Joseph Lo
1
-2
/
+0
2012-11-16
ARM: tegra: retain L2 content over CPU suspend/resume
Joseph Lo
1
-0
/
+11
2012-11-16
ARM: tegra: cpuidle: add CPU resume function
Joseph Lo
1
-0
/
+60
2012-11-05
ARM: tegra: move iomap.h to mach-tegra
Stephen Warren
1
-2
/
+1
2012-09-13
ARM: tegra: clean up the common assembly macros into sleep.h
Joseph Lo
1
-5
/
+1
2012-02-27
ARM: tegra: support for secondary cores on Tegra30
Peter De Schrijver
1
-0
/
+32
2012-02-27
ARM: tegra: rework Tegra secondary CPU core bringup
Peter De Schrijver
1
-8
/
+127
2010-08-06
[ARM] tegra: SMP support
Colin Cross
1
-0
/
+61