| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2011-09-21 | ARM: CSR: PM: add sleep entry for SiRFprimaII | Rongjun Ying | 1 | -0/+1 |
| 2011-09-11 | ARM: CSR: add rtc i/o bridge interface for SiRFprimaII | Zhiwu Song | 1 | -0/+1 |
| 2011-07-09 | ARM: CSR: initializing L2 cache | Rongjun Ying | 1 | -0/+1 |
| 2011-07-09 | ARM: CSR: mapping early DEBUG_LL uart | Barry Song | 1 | -0/+1 |
| 2011-07-09 | ARM: CSR: Adding CSR SiRFprimaII board support | Binghua Duan | 1 | -0/+5 |
 |
index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |