summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/sun9i-a80.dtsi
AgeCommit message (Expand)AuthorFilesLines
2017-02-07Merge tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/...Arnd Bergmann1-0/+3
2017-02-07ARM: DTS: Fix register map for virt-capable GICMarc Zyngier1-1/+1
2017-01-10ARM: dts: sunxi: Explicitly enable pull-ups for MMC pinsChen-Yu Tsai1-0/+3
2016-12-26ARM: sunxi: Convert pinctrl nodes to generic bindingsMaxime Ripard1-25/+25
2016-12-26ARM: sunxi: Remove useless allwinner,pull propertyMaxime Ripard1-7/+0
2016-12-26ARM: sunxi: Remove useless allwinner,drive propertyMaxime Ripard1-4/+0
2016-11-22ARM: sunxi: Add the missing clocks to the pinctrl nodesMaxime Ripard1-2/+4
2016-11-22ARM: dts: sun9i: Add mmc1 pinmux settingChen-Yu Tsai1-0/+8
2016-08-27ARM: dts: sun9i: Add missing #interrupt-cells to R_PIO pinctrl device nodeChen-Yu Tsai1-2/+1
2016-08-22ARM: dts: sun9i: Switch to the AC100 RTC clock outputs for osc32kChen-Yu Tsai1-6/+5
2016-01-25ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pinsChen-Yu Tsai1-1/+2
2016-01-25ARM: dts: sun9i: Use sun9i specific mmc compatibleChen-Yu Tsai1-4/+4
2015-12-03ARM: dts: sun9i: Add NMI controller device nodeChen-Yu Tsai1-0/+8
2015-12-01ARM: dts: sun9i: Add Reduced Serial Bus controller device node to A80 dtsiChen-Yu Tsai1-0/+21
2015-12-01ARM: dts: sun9i: Add consumer IR receiver device node and pinmux settingsChen-Yu Tsai1-0/+19
2015-12-01ARM: dts: sun9i: Add A80 R_PIO pin controller device nodeChen-Yu Tsai1-0/+14
2015-12-01ARM: dts: sun9i: Add TODO comments for the main and low power clocksChen-Yu Tsai1-0/+18
2015-12-01ARM: dts: sun9i: Add A80 PRCM clocks and reset control nodesChen-Yu Tsai1-1/+78
2015-10-17ARM: dts: sunxi: Fix interrupt-cells for [r]pio on A23/A31/A33/A80Hans de Goede1-1/+1
2015-08-12ARM: sun9i: Wrap the clock-indicesMaxime Ripard1-10/+22
2015-06-01ARM: dts: sun9i: Add device node for watchdogChen-Yu Tsai1-0/+6
2015-05-10ARM: sunxi: DT: Fix lines over 80 charactersMaxime Ripard1-1/+1
2015-05-10ARM: sunxi: dt: Remove the FSF addressMaxime Ripard1-5/+0
2015-04-27ARM: dts: sun9i: Enable ARM architected timer on A80Chen-Yu Tsai1-0/+10
2015-04-27ARM: dts: sunxi: Add address- and size-cells properties to the mmc ctrl nodesHans de Goede1-0/+8
2015-04-27ARM: dts: sun9i: Add USB host controller nodes to a80 dtsiChen-Yu Tsai1-0/+55
2015-04-27ARM: dts: sun9i: Add usb phy nodes to a80 dtsiChen-Yu Tsai1-0/+37
2015-04-27ARM: dts: sun9i: Add usb clock nodes to a80 dtsiChen-Yu Tsai1-0/+22
2015-02-17Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...Linus Torvalds1-32/+160
2015-01-25ARM: sunxi: dt: Fix aliasesMaxime Ripard1-10/+0
2015-01-21ARM: dts: sun9i: Add 8 bit mmc pinmux setting for mmc2Chen-Yu Tsai1-0/+9
2015-01-21ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsiChen-Yu Tsai1-0/+48
2015-01-21ARM: dts: sun9i: Add mmc config clock nodesChen-Yu Tsai1-0/+13
2015-01-21ARM: dts: sun9i: Add pinmux setting for mmc0Chen-Yu Tsai1-0/+8
2015-01-21ARM: dts: sun9i: Add clock-indices property for bus gate clocksChen-Yu Tsai1-0/+10
2015-01-21ARM: dts: sun9i: Add mmc module clock nodes for A80Chen-Yu Tsai1-0/+36
2015-01-21ARM: sunxi: DT: Convert the DTs to use the GIC headersMaxime Ripard1-25/+27
2015-01-21ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodesMaxime Ripard1-6/+8
2015-01-21ARM: sunxi: DT: Convert to device tree includesMaxime Ripard1-1/+1
2014-10-31ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoCChen-Yu Tsai1-0/+7
2014-10-31ARM: dts: sun9i: Add i2c3 pinmux setting for A80 SoCChen-Yu Tsai1-0/+7
2014-10-31ARM: dts: sun9i: Add i2c controller nodes to a80 dtsiChen-Yu Tsai1-0/+55
2014-10-30ARM: sun9i: optimus: Set UART0 muxingMaxime Ripard1-0/+7
2014-10-30ARM: sun9i: Enable the A80 pinctrl driverMaxime Ripard1-0/+16
2014-10-28ARM: sunxi: Fix GPLv2 wordingMaxime Ripard1-3/+3
2014-10-21ARM: dts: sun9i: Add basic clocks and reset controlsChen-Yu Tsai1-6/+171
2014-10-20ARM: dts: sunxi: Add Allwinner A80 dtsiChen-Yu Tsai1-0/+257
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-22 18:40:27 +0300