summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/dra7xx-clocks.dtsi
AgeCommit message (Expand)AuthorFilesLines
2017-09-19ARM: dts: dra7: Set a default parent to mcasp3_ahclkx_muxKeerthy1-0/+2
2017-06-12ARM: dts: dra7xx-clocks: Use DPLL_GPU for GPU clocksSubhajit Paul1-0/+8
2017-06-12ARM: dts: dra7xx-clocks: Set IVA DPLL and its output clock ratesSuman Anna1-0/+4
2017-06-12ARM: dts: dra7xx-clocks: Set DSP DPLL and its output clock ratesSuman Anna1-0/+6
2017-06-12ARM: dts: dra7xx-clocks: Source IPU1 functional clock from CORE DPLLSuman Anna1-0/+2
2016-08-31ARM: dts: dra7: cpsw: fix clocks treeGrygorii Strashko1-8/+8
2016-08-31ARM: dts: dra7: Fix clock data for gmac_gmii_ref_clk_divJ.D. Schroeder1-4/+11
2016-05-18Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/ar...Linus Torvalds1-188/+188
2016-04-11ARM: dts: dra7xx: Correct mcasp8_ahclkx_mux namePeter Ujfalusi1-1/+1
2016-04-11ARM: dts: dra7: fix clock node definitions to avoid build warningsTero Kristo1-188/+188
2016-04-08ARM: dts: dra7: Correct clock tree for sys_32k_ckKeerthy1-1/+17
2016-03-01ARM: dts: DRA7: Add TBCLK for PWMSSVignesh R1-0/+24
2015-06-04arm/dts: dra7xx: add 'ti,set-rate-parent' for dss_dss_clkTomi Valkeinen1-0/+1
2015-06-03arm: dra7: add DESHDCP clockTomi Valkeinen1-0/+10
2015-04-03Merge tag 'omap-for-v4.1/wl12xx-dt' of git://git.kernel.org/pub/scm/linux/ker...Olof Johansson1-9/+81
2015-03-17ARM: dts: dra7xx-clocks: Add gate clock for CLKOUT2Peter Ujfalusi1-0/+8
2015-03-06ARM: dts: DRA7x: Fix the bypass clock source for dpll_iva and othersRavikumar Kattekola1-9/+81
2014-11-14ARM: dts: dra7: fix DSS PLL clock mux registersTomi Valkeinen1-3/+3
2014-07-19Merge tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx into next/dtOlof Johansson1-4/+6
2014-07-19Merge tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/ker...Olof Johansson1-3/+36
2014-07-15ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instanceKishon Vijay Abraham I1-0/+24
2014-07-15ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instanceKishon Vijay Abraham I1-3/+3
2014-07-15ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHYKishon Vijay Abraham I1-0/+8
2014-07-15ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pc...Keerthy1-1/+1
2014-07-15ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clockKeerthy1-0/+1
2014-07-07Merge branch 'for-v3.16-rc/clk-dt-fixes' of https://github.com/t-kristo/linux...Tony Lindgren1-4/+6
2014-07-03ARM: dts: dra7xx-clocks: Fix the l3 and l4 clock ratesRajendra Nayak1-4/+6
2014-06-16ARM: DTS: dra7/dra7xx-clocks: ATL related changesPeter Ujfalusi1-8/+8
2014-06-11Merge branch 'for-v3.16/ti-clk-drv' of github.com:t-kristo/linux-pm into clk-...Mike Turquette1-12/+12
2014-06-06ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher...Nishanth Menon1-1/+1
2014-05-28ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clockPeter Ujfalusi1-11/+11
2014-05-15ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gateRoger Quadros1-2/+10
2014-04-19ARM: dts: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shiftPeter Ujfalusi1-1/+1
2014-01-18ARM: dts: DRA7: Add PCIe related clock nodesJ Keerthy1-0/+25
2014-01-18ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clockJ Keerthy1-6/+3
2014-01-18ARM: dts: clk: Add apll related clocksJ Keerthy1-3/+11
2014-01-18ARM: dts: dra7 clock dataTero Kristo1-0/+1985
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-01 07:35:33 +0300