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2022-04-08ARM: dts: bcm2711: Add the missing L1/L2 cache informationRichard Schleich1-0/+50
[ Upstream commit 618682b350990f8f1bee718949c4b3858711eb58 ] This patch fixes the kernel warning "cacheinfo: Unable to detect cache hierarchy for CPU 0" for the bcm2711 on newer kernel versions. Signed-off-by: Richard Schleich <rs@noreya.tech> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> [florian: Align and remove comments matching property values] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-03-16ARM: boot: dts: bcm2711: Fix HVS register rangeMaxime Ripard1-0/+1
[ Upstream commit 515415d316168c6521d74ea8280287e28d7303e6 ] While the HVS has the same context memory size in the BCM2711 than in the previous SoCs, the range allocated to the registers doubled and it now takes 16k + 16k, compared to 8k + 16k before. The KMS driver will use the whole context RAM though, eventually resulting in a pointer dereference error when we access the higher half of the context memory since it hasn't been mapped. Fixes: 4564363351e2 ("ARM: dts: bcm2711: Enable the display pipeline") Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-01-11ARM: dts: gpio-ranges property is now requiredPhil Elwell1-0/+2
[ Upstream commit c8013355ead68dce152cf426686f8a5f80d88b40 ] Since [1], added in 5.7, the absence of a gpio-ranges property has prevented GPIOs from being restored to inputs when released. Add those properties for BCM283x and BCM2711 devices. [1] commit 2ab73c6d8323 ("gpio: Support GPIO controllers without pin-ranges") Link: https://lore.kernel.org/r/20220104170247.956760-1-linus.walleij@linaro.org Fixes: 2ab73c6d8323 ("gpio: Support GPIO controllers without pin-ranges") Fixes: 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs") Reported-by: Stefan Wahren <stefan.wahren@i2se.com> Reported-by: Florian Fainelli <f.fainelli@gmail.com> Reported-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Phil Elwell <phil@raspberrypi.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20211206092237.4105895-3-phil@raspberrypi.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-12-01ARM: dts: bcm2711: Fix PCIe interruptsFlorian Fainelli1-1/+7
[ Upstream commit 98481f3d72fb88cb5b973153434061015f094925 ] The PCIe host bridge has two interrupt lines, one that goes towards it PCIE_INTR2 second level interrupt controller and one for its MSI second level interrupt controller. The first interrupt line is not currently managed by the driver, which is why it was not a functional problem. The interrupt-map property was also only listing the PCI_INTA interrupts when there are also the INTB, C and D. Reported-by: Jim Quinlan <jim2101024@gmail.com> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-10-06ARM: dts: bcm2711: fix MDIO #address- and #size-cellsStefan Wahren1-2/+2
The values of #address-cells and #size-cells are swapped. Fix this and avoid the following DT schema warnings for mdio@e14: #address-cells:0:0: 1 was expected #size-cells:0:0: 0 was expected Fixes: be8af7a9e3cc ("ARM: dts: bcm2711-rpi-4: Enable GENET support") Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/1628334401-6577-2-git-send-email-stefan.wahren@i2se.com Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2021-10-06ARM: dts: bcm283x: Fix VEC address for BCM2711Mateusz Kwiatkowski1-0/+8
The VEC has a different address (0x7ec13000) on the BCM2711 (used in e.g. Raspberry Pi 4) compared to BCM283x (e.g. Pi 3 and earlier). This was erroneously not taken account for. Definition of the VEC in the devicetrees had to be moved from bcm283x.dtsi to bcm2711.dtsi and bcm2835-common.dtsi to allow for this differentiation. Fixes: 7894bdc6228f ("ARM: boot: dts: bcm2711: Add BCM2711 VEC compatible") Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/1626980528-3835-1-git-send-email-stefan.wahren@i2se.com Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2021-06-08ARM: dts: bcm283x: Fix up MMC node namesStefan Wahren1-1/+1
Fix the node names for the MMC/SD card controller to conform to the standard node name mmc@.. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/1622981777-5023-2-git-send-email-stefan.wahren@i2se.com Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2021-06-08ARM: boot: dts: bcm2711: Add BCM2711 VEC compatibleMateusz Kwiatkowski1-0/+1
The BCM2711 has a slightly different VEC than the one found in the older SoCs. Now that we support the new variant, add its compatible to the device tree. Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210520150344.273900-5-maxime@cerno.tech Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2021-02-17Revert "ARM: dts: bcm2711: Add the BSC interrupt controller"Florian Fainelli1-12/+0
As Dave reported: This seems to have unintended side effects. GIC interrupt 117 is shared between the standard I2C controllers (i2c-bcm2835) and the l2-intc block handling the HDMI I2C interrupts. There is not a great way to share an interrupt between an interrupt controller using the chained IRQ handler which is an interrupt flow and another driver like i2c-bcm2835 which uses an interrupt handler (although it specifies IRQF_SHARED). Simply revert this change for now which will mean that HDMI I2C will be polled, like it was before. Reported-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Acked-by: Maxime Ripard <mripard@kernel.org> Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-01-28ARM: dts: bcm2711: Add the CEC interrupt controllerMaxime Ripard1-0/+18
The CEC and hotplug interrupts go through an interrupt controller shared between the two HDMI controllers. Let's add that interrupt controller and the interrupts for both HDMI controllers Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20210111142309.193441-16-maxime@cerno.tech
2021-01-25ARM: dts: bcm2711: Add the BSC interrupt controllerMaxime Ripard1-0/+12
The BSC controllers used for the HDMI DDC have an interrupt controller shared between both instances. Let's add it to avoid polling. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20210111142309.193441-1-maxime@cerno.tech
2021-01-25ARM: dts: bcm2711: Use compatible string for BCM2711 DSI1Dave Stevenson1-0/+1
Updates the compatible string for DSI1 on BCM2711 to differentiate it from BCM2835. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20201203132543.861591-9-maxime@cerno.tech
2020-09-08ARM: dts: bcm2711: Enable the display pipelineMaxime Ripard1-1/+121
Now that all the drivers have been adjusted for it, let's bring in the necessary device tree changes. The VEC and PV3 are left out for now, since it will require a more specific clock setup. Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/cfce2276d172d3d9c4d34d966b58fd47f77c4e46.1599120059.git-series.maxime@cerno.tech
2020-07-06ARM: dts: bcm2711: Add HDMI DVPMaxime Ripard1-0/+15
Now that we have a driver for the DVP, let's add its DT node. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/e22222ca7f41b960e9bb1a31e0dd2de95b8c0cd1.1591867332.git-series.maxime@cerno.tech
2020-03-09ARM: dts: bcm2711: Move emmc2 into its own busNicolas Saenz Julienne1-5/+20
Depending on bcm2711's revision its emmc2 controller might have different DMA constraints. Raspberry Pi 4's firmware will take care of updating those, but only if a certain alias is found in the device tree. So, move emmc2 into its own bus, so as not to pollute other devices with dma-ranges changes and create the emmc2bus alias. Based in Phil ELwell's downstream implementation. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20200304132437.20164-1-nsaenzjulienne@suse.de
2020-02-09Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-25/+45
Pull ARM Device-tree updates from Olof Johansson: "New SoCs: - Atmel/Microchip SAM9X60 (ARM926 SoC) - OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all variants of it with different GPU/media IP configurations. - ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU) - ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of db8500) - Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem) - Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class) New boards: - Allwinner: + Emlid Neutis SoM (H3 variant) + Libre Computer ALL-H3-IT + PineH64 Model B - Amlogic: + Libretech Amlogic GX PC (s905d and s912-based variants) - Atmel/Microchip: + Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1) - Marvell: + Armada 385-based SolidRun Clearfog GTR - NXP: + Gateworks GW59xx boards based on i.MX6/6Q/6QDL + Tolino Shine 3 eBook reader (i.MX6sl) + Embedded Artists COM (i.MX7ULP) + SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems) + Google Coral Edge TPU (i.MX8MQ) - Rockchip: + Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs) + Radxa Rock Pi N10 (RK3399Pro-based) + VMARC RK3399Pro SOM - ST: + Reference boards for stm32mp15 - ST Ericsson: + Samsung Galaxy S III mini (GT-I8190) + HREF520 reference board for DB8520 - TI OMAP: + Gen1 Amazon Echo (OMAP3630-based) - Qualcomm: + Inforce 6640 Single Board Computer (msm8996-based) + SC7180 IDP (SC7180-based)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (623 commits) dt-bindings: fix compilation error of the example in marvell,mmp3-hsic-phy.yaml arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 camera arm64: dts: ti: k3-am65-main Add CAL node arm64: dts: ti: k3-j721e-main: Add McASP nodes arm64: dts: ti: k3-am654-main: Add McASP nodes arm64: dts: ti: k3-j721e: DMA support arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS arm64: dts: ti: k3-am65: DMA support arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss arm64: dts: ti: k3-am65-main: Correct main NAVSS representation ARM: dts: aspeed: rainier: Add UCD90320 power sequencer ARM: dts: aspeed: rainier: Switch PSUs to unknown version arm64: dts: rockchip: Kill off "simple-panel" compatibles ARM: dts: rockchip: Kill off "simple-panel" compatibles arm64: dts: rockchip: rename dwmmc node names to mmc ARM: dts: rockchip: rename dwmmc node names to mmc arm64: dts: exynos: Rename Samsung and Exynos to lowercase arm64: dts: uniphier: add reset-names to NAND controller node ...
2020-01-27ARM: dts: bcm2711: Enable thermalStefan Wahren1-0/+12
This enables thermal for the BCM2711 (used on Raspberry Pi 4) by adding the AVS monitor and a subnode for the thermal part. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1578941778-23321-4-git-send-email-stefan.wahren@i2se.com
2020-01-16ARM: dts: bcm2711: Enable PCIe controllerNicolas Saenz Julienne1-1/+30
This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-16ARM: dts: bcm283x: Unify CMA configurationNicolas Saenz Julienne1-20/+13
With the introduction of the Raspberry Pi 4 we were forced to explicitly configure CMA's location, since arm64 defaults it into the ZONE_DMA32 memory area, which is not good enough to perform DMA operations on that device. To bypass this limitation a dedicated CMA DT node was created, explicitly indicating the acceptable memory range and size. That said, compatibility between boards is a must on the Raspberry Pi ecosystem so this creates a common CMA DT node so as for DT overlays to be able to update CMA's properties regardless of the board being used. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-07ARM: dts: bcm2711: Enable HWRNG supportStephen Brennan1-4/+2
This enables hardware random number generator support for the BCM2711 on the Raspberry Pi 4 board. Signed-off-by: Stephen Brennan <stephen@brennan.io> Acked-by: Stefan Wahren <wahrenst@gmx.net> [nsaenzjulienne@suse.de: remove unnecessary status="okay"] Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
2019-12-09ARM: dts: bcm2711: fix soc's node dma-rangesNicolas Saenz Julienne1-1/+1
Raspberry Pi's firmware has a feature to select how much memory to reserve for its GPU called 'gpu_mem'. The possible values go from 16MB to 944MB, with a default of 64MB. This memory resides in the topmost part of the lower 1GB memory area and grows bigger expanding towards the begging of memory. It turns out that with low 'gpu_mem' values (16MB and 32MB) the size of the memory available to the system in the lower 1GB area can outgrow the interconnect's dma-range as its size was selected based on the maximum system memory available given the default gpu_mem configuration. This makes that memory slice unavailable for DMA. And may cause nasty kernel warnings if CMA happens to include it. Change soc's dma-ranges to really reflect it's HW limitation, which is being able to only DMA to the lower 1GB area. Fixes: 7dbe8c62ceeb ("ARM: dts: Add minimal Raspberry Pi 4 support") Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-11-14ARM: dts: bcm2711-rpi-4: Enable GENET supportStefan Wahren1-0/+26
This enables the Gigabit Ethernet support on the Raspberry Pi 4. The defined PHY mode is equivalent to the default register settings in the downstream tree. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-11-14ARM: dts: bcm2711: force CMA into first GB of memoryNicolas Saenz Julienne1-0/+20
arm64 places the CMA in ZONE_DMA32, which is not good enough for the Raspberry Pi 4 since it contains peripherals that can only address the first GB of memory. Explicitly place the CMA into that area. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-10-10ARM: dts: Add minimal Raspberry Pi 4 supportStefan Wahren1-0/+844
This adds minimal support for the new Raspberry Pi 4 without the fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory size to zero and let the bootloader take care of it. The DWC2 is still usable as peripheral via the USB-C port. Other differences to the Raspberry Pi 3: - additional GIC 400 Interrupt controller - new thermal IP and HWRNG - additional MMC interface (emmc2) - additional UART, I2C, SPI and PWM interfaces - clock stretching bug in I2C IP has been fixed Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Florian Fanelli <f.fainelli@gmail.com>
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