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path: root/arch/arc/mm/cache.c
AgeCommit message (Expand)AuthorFilesLines
2016-09-07ARC: Elide redundant setup of DMA callbacksVineet Gupta1-0/+9
2015-10-29ARC: mm: PAE40 supportVineet Gupta1-4/+40
2015-10-28ARC: mm: PAE40: switch to using phys_addr_t for physical addressesVineet Gupta1-13/+13
2015-10-28ARC: mm: preps ahead of HIGHMEM supportVineet Gupta1-5/+11
2015-10-17ARC: boot log: move helper macros to header for reuseVineet Gupta1-3/+2
2015-08-21ARC: Eliminate some ARCv2 specific code for ARCompact buildVineet Gupta1-26/+32
2015-08-20ARCv2: IOC: Allow boot time disableAlexey Brodkin1-3/+4
2015-08-20ARCv2: SLC: Allow boot time disableVineet Gupta1-2/+19
2015-08-20ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin1-16/+98
2015-07-06ARCv2: guard SLC DMA ops with spinlockAlexey Brodkin1-2/+10
2015-06-25ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)Vineet Gupta1-2/+62
2015-06-22ARCv2: MMUv4: support aliasing icache configVineet Gupta1-1/+13
2015-06-22ARCv2: MMUv4: cache programming model changesVineet Gupta1-15/+97
2015-06-19ARC: untangle cache flush loopVineet Gupta1-25/+55
2015-06-19ARC: cacheflush: No need to retain DC_CTRL from __before_dc_op()Vineet Gupta1-20/+19
2015-06-19ARC: cacheflush: move some code around, delete old commentsVineet Gupta1-165/+102
2015-06-19ARC: mm/cache_arc700.c -> mm/cache.cVineet Gupta1-0/+723
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