| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-06-10 | cxl/acpi: Introduce the root of a cxl_port topology | Dan Williams | 1 | -0/+6 |
| 2021-05-26 | cxl: Rename mem to pci | Ben Widawsky | 1 | -3/+3 |
| 2021-05-21 | cxl/docs: Fix "Title underline too short" warning | Dan Williams | 1 | -1/+1 |
| 2021-05-15 | cxl/core: Rename bus.c to core.c | Dan Williams | 1 | -3/+3 |
| 2021-02-17 | cxl/mem: Add basic IOCTL interface | Ben Widawsky | 1 | -0/+12 |
| 2021-02-17 | cxl/mem: Register CXL memX devices | Dan Williams | 1 | -0/+5 |
| 2021-02-17 | cxl/mem: Find device capabilities | Ben Widawsky | 1 | -0/+14 |
| 2021-02-17 | cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints | Dan Williams | 2 | -0/+27 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |