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2022-04-14Merge tag 'v5.15.34' into dev-5.15Joel Stanley1-1/+1
This is the 5.15.34 stable release Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-04-08dt-bindings: pinctrl: pinctrl-microchip-sgpio: Fix exampleHoratiu Vultur1-1/+1
commit a6ff90f3fbd4d902aad8777f0329cef3a2768bde upstream. The blamed commit adds support for irq, but the reqisters for irq are outside of the memory size. They are at address 0x108. Therefore update the memory size to cover all the registers used by the device. Fixes: 01a9350bdd49fb ("dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220204153535.465827-2-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-31dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/groupJae Hyun Yoo1-2/+2
Add FWQSPI function/group to support QSPI mode on the dedicated FWSPI interface. OpenBMC-Staging-Count: 1 Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220329173932.2588289-6-quic_jaehyoo@quicinc.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-03-31dt-bindings: pinctrl: aspeed-g6: remove FWQSPID groupJae Hyun Yoo1-1/+1
FWQSPID is not a group of FWSPID so remove it. OpenBMC-Staging-Count: 1 Fixes: 7488838f2315 ("dt-bindings: pinctrl: aspeed: Document AST2600 pinmux") Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220329173932.2588289-4-quic_jaehyoo@quicinc.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-14dt-bindings: pinctrl: brcm,ns-pinmux: drop unneeded CRU from exampleRafał Miłecki1-16/+8
There is no need to include CRU in example of this binding. It wasn't complete / correct anyway. The proper binding can be find in the mfd/brcm,cru.yaml . Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211008205938.29925-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-14Revert "dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon"Rafał Miłecki1-10/+13
This reverts commit 2ae80900f239484069569380e1fc4340fd6e0089. My rework was unneeded & wrong. It replaced a clear & correct "reg" property usage with a custom "offset" one. Back then I didn't understand how to properly handle CRU block binding. I heard / read about syscon and tried to use it in a totally invalid way. That change also missed Rob's review (obviously). Northstar's pin controller is a simple consistent hardware block that can be cleanly mapped using a 0x24 long reg space. Since the rework commit there wasn't any follow up modifying in-kernel DTS files to use the new binding. Broadcom also isn't known to use that bugged binding. There is close to zero chance this revert may actually cause problems / regressions. This commit is a simple revert. Example binding may (should) be updated / cleaned up but that can be handled separately. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211008205938.29925-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-17Merge tag 'samsung-pinctrl-5.15' of ↵Linus Walleij1-0/+1
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v5.15 1. Fix number of pins in one GPIO pin bank. 2. Add support for Exynos850 SoC (Exynos3830).
2021-08-14Merge tag 'renesas-pinctrl-for-v5.15-tag2' of ↵Linus Walleij1-0/+155
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.15 (take two) - Add pin control and GPIO support for the new RZ/G2L SoC.
2021-08-13dt-bindings: pinctrl: samsung: Add Exynos850 docSam Protsenko1-0/+1
Document compatible string for Exynos850 SoC. Nothing else is changed, as Exynos850 SoC uses already existing samsung pinctrl driver. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20210811114827.27322-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-08-11dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driverLakshmi Sowjanya D1-0/+135
Add Device Tree bindings documentation for Intel Keem Bay SoC's pin controller. Add entry for INTEL Keem Bay pinctrl driver in MAINTAINERS file Co-developed-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Co-developed-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Acked-by: Mark Gross <mgross@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210806142527.29113-2-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts propertysatya priya1-24/+4
Remove the interrupts property as we no longer specify it. Signed-off-by: satya priya <skakit@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1627910464-19363-4-git-send-email-skakit@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAMLsatya priya2-294/+259
Convert Qualcomm PMIC GPIO bindings from .txt to .yaml format. Signed-off-by: satya priya <skakit@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1627910464-19363-3-git-send-email-skakit@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: mt8195: Use real world values for drive-strength argumentsChen-Yu Tsai1-4/+1
The original binding submission for MT8195 pinctrl described the possible drive strength values in micro-amps in its description, but then proceeded to list register values in its device tree binding constraints. However, the macros used with the Mediatek pinctrl bindings directly specify the drive strength in micro-amps, instead of hardware register values. The current driver implementation in Linux does convert the value from micro-amps to hardware register values. This implementation is also used with MT7622 and MT8183, which use real world values in their device trees. Given the above, it was likely an oversight to use the raw register values in the binding. Correct the values in the binding. Also drop the description since the binding combined with its parent, pinctrl/pincfg.yaml, the binding is now self-describing. Fixes: 7f7663899d94 ("dt-bindings: pinctrl: mt8195: add pinctrl file and binding document") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210726111941.1447057-1-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11Merge branch 'ib-mt8135' into develLinus Walleij8-861/+980
2021-08-11dt-bindings: mediatek: convert pinctrl to yamlHsin-Yi Wang8-861/+980
Convert mt65xx, mt6796, mt7622, mt8183 bindings to yaml. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210804044033.3047296-3-hsinyi@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11dt-bindings: pinctrl: Add bindings for Ingenic X2100.周琰杰 (Zhou Yanjie)1-4/+6
Add the pinctrl bindings for the X2100 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1627108604-91304-4-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-10dt-bindings: pinctrl: stm32: add new compatible for STM32MP135 SoCAlexandre Torgue1-0/+1
New compatible to manage ball out and pin muxing of STM32MP135 SoC. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de Link: https://lore.kernel.org/r/20210723132810.25728-2-alexandre.torgue@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-10pinctrl: qcom: spmi-gpio: Add pmc8180 & pmc8180cBjorn Andersson1-0/+4
The SC8180x platform comes with PMC8180 and PMC8180c, add support for the GPIO controller in these PMICs. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210629003851.1787673-1-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-10dt-bindings: pinctrl: renesas: Add DT bindings for RZ/G2L pinctrlLad Prabhakar1-0/+155
Add device tree binding documentation and header file for Renesas RZ/G2L pinctrl. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210727112328.18809-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-08-01dt-bindings: pinctrl: qcom: Add SM6115 pinctrl bindingsIskren Chernev1-0/+179
Add device tree binding Documentation details for Qualcomm SM6115 and SM4250 pinctrl. Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210723192352.546902-2-iskren.chernev@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-30dt-bindings: pinctrl-zynq: Replace 'io-standard' with 'power-source'Sai Krishna Potthuri1-5/+3
Replace custom pin configuration option 'io-standard' with generic property 'power-source' for Zynq pinctrl also add dt-binding file contains pin configuration defines for Zynq pinctrl. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1626868353-96475-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-30dt-bindings: pinctrl: pinctrl-zynq: Convert to yamlSai Krishna Potthuri2-105/+216
Convert the Zynq pinctrl binding file to yaml. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1626868353-96475-2-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adpBhupesh Sharma1-0/+2
Add pmic-gpio compatible string for pmm8155au pmic found on the SA8155p-adp board. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20210629123407.82561-3-bhupesh.sharma@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: qcom,pmic-gpio: Arrange compatibles alphabeticallyBhupesh Sharma1-31/+31
Arrange the compatibles inside qcom-pmic gpio device tree bindings alphabetically. While at it, also make some minor cosmetic changes to allow future compatible addition to the bindings simpler. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20210629123407.82561-2-bhupesh.sharma@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: imx8ulp: Add pinctrl bindingJacky Bai1-0/+79
Add pinctrl binding doc for i.MX8ULP Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Link: https://lore.kernel.org/r/20210607061041.2654568-1-ping.bai@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23pinctrl: armada-37xx: Correct PWM pins definitionsMarek Behún1-4/+4
The PWM pins on North Bridge on Armada 37xx can be configured into PWM or GPIO functions. When in PWM function, each pin can also be configured to drive low on 0 and tri-state on 1 (LED mode). The current definitions handle this by declaring two pin groups for each pin: - group "pwmN" with functions "pwm" and "gpio" - group "ledN_od" ("od" for open drain) with functions "led" and "gpio" This is semantically incorrect. The correct definition for each pin should be one group with three functions: "pwm", "led" and "gpio". Change the "pwmN" groups to support "led" function. Remove "ledN_od" groups. This cannot break backwards compatibility with older device trees: no device tree uses it since there is no PWM driver for this SOC yet. Also "ledN_od" groups are not even documented. Fixes: b835d6953009 ("pinctrl: armada-37xx: swap polarity on LED group") Signed-off-by: Marek Behún <kabel@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210719112938.27594-1-kabel@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23dt-bindings: pinctrl: qcom: Add bindings for MDM9607Konrad Dybcio1-0/+133
Document the newly added MDM9607 pinctrl driver. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210624191743.617073-1-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-03Merge tag 'devicetree-for-5.14' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Refine reserved memory nomap handling - Merge some PCI and non-PCI address handling implementations - Simplify of_address.h header ifdefs - Improve printk handling of some 64-bit types - Convert adi,adv7511, Arm ccree, Arm SCMI, Arm SCU, Arm TWD timer, Arm VIC, arm,sbsa-gwdt, Arm/Amlogic SCPI, Aspeed I2C, Broadcom iProc PWM, linaro,optee-tz, MDIO GPIO, Mediatek RNG, MTD physmap, NXP pcf8563/pcf85263/pcf85363, Renesas TPU, renesas,emev2-smu, renesas,r9a06g032-sysctrl, sysc-rmobile, Tegra20 EMC, TI AM56 PCI, TI OMAP mailbox, TI SCI bindings, virtio-mmio, Zynq FPGA, and ZynqMP RTC to DT schema - Convert mux and mux controller bindings to schema. This includes MDIO IIO, and I2C muxes. - Add Arm PL031 RTC binding schema - Add vendor prefixes for StarFive Technology Co. Ltd. and Insignal Ltd - Fix some stale doc references - Remove stale property-units.txt. Superseded by schema in dt-schema repo. - Fixes for 'unevaluatedProperties' handling (enabled with experimental json-schema support) - Drop redundant usage of minItems and maxItems across the tree - Update some examples to use bindings with a schema * tag 'devicetree-for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (83 commits) dt-bindings: Fix 'unevaluatedProperties' errors in DT graph users dt-bindings: display: renesas,du: Fix 'ports' reference dt-bindings: media: adv7180: Add missing video-interfaces.yaml reference dt-bindings: crypto: ccree: Convert to json-schema dt-bindings: fpga: zynq: convert bindings to YAML dt-bindings: rtc: zynqmp: convert bindings to YAML dt-bindings: interrupt-controller: Convert ARM VIC to json-schema of: of_reserved_mem: mark nomap memory instead of removing of: of_reserved_mem: only call memblock_free for normal reserved memory dt-bindings: Drop redundant minItems/maxItems dt-bindings: spmi: Correct 'reg' schema of: reserved-memory: Add stub for RESERVEDMEM_OF_DECLARE() dt-bindings: clk: vc5: Fix example dt-bindings: timer: renesas,tmu: add r8a779a0 TMU support dt-bindings: drm: bridge: adi,adv7511.txt: convert to yaml dt-bindings: PCI: ti,am65: Convert PCIe host/endpoint mode dt-bindings to YAML of: Remove superfluous casts when printing u64 values of: Fix truncation of memory sizes on 32-bit platforms dt-bindings: rtc: nxp,pcf8563: Absorb pcf85263/pcf85363 bindings dt-bindings: pwm: Use examples with documented/matching schema ...
2021-06-21dt-bindings: Drop redundant minItems/maxItemsRob Herring1-1/+0
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. This condition is partially checked with the meta-schema already, but only if both 'minItems' and 'maxItems' are equal to the 'items' length. An improved meta-schema is pending. Cc: Jens Axboe <axboe@kernel.dk> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Kamal Dasu <kdasu.kdev@gmail.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <maz@kernel.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Vivien Didelot <vivien.didelot@gmail.com> Cc: Vladimir Oltean <olteanv@gmail.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de> Cc: Lee Jones <lee.jones@linaro.org> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Wim Van Sebroeck <wim@linux-watchdog.org> Cc: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # for MMC Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Acked-By: Vinod Koul <vkoul@kernel.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20210615191543.1043414-1-robh@kernel.org
2021-06-18dt-bindings: pinctrl: qcom: sm6125: Document SM6125 pinctrl driverMartin Botka1-0/+132
Document the newly added SM6125 pinctrl driver Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210614172713.558192-1-martin.botka@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-12dt-bindings: pinctrl: mcp23s08: add documentation for reset-gpiosAndreas Kaessens1-0/+2
The reset-gpios property is added to the optional dt-bindings and also an example for it's usage. Signed-off-by: Andreas Kaessens <akaessens@gmail.com> Signed-off-by: Darian Biastoch <d.biastoch@gmail.com> Link: https://lore.kernel.org/r/20210610132438.3085841-2-akaessens@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-28dt-bindings: pinctrl: Update enum for adding SGPM2 and SGPS2Steven Lee1-5/+5
AST2600 has 2 SGPIO master interfaces one with 128 pins and another one has 80 pins. It also supports 2 SGPIO slave interfaces. In the current bindings, there are only SGPM1 and SGPS1 defined in enum, SGPM2 and SGPS2 should also be added in the bindings. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210525055308.31069-2-steven_lee@aspeedtech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-27dt-bindings: pinctrl: mt65xx: add mt8365 SoC bindingFabien Parent1-0/+1
Add binding documentation for MT8365 Pin controller. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210519162409.3755679-1-fparent@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-25dt-bindings: pinctrl: Add DT bindings for apple, pinctrlMark Kettenis1-0/+106
The Apple GPIO controller is a simple combined pin and GPIO conroller present on Apple ARM SoC platforms, including various iPhone and iPad devices and the "Apple Silicon" Macs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Link: https://lore.kernel.org/r/20210520171310.772-2-mark.kettenis@xs4all.nl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-20dt-bindings: pinctrl: qcom-pmic-gpio: Add pm7325 supportsatya priya1-0/+2
Add compatible string for PM7325 pmic GPIO support to the Qualcomm PMIC GPIO binding. Signed-off-by: satya priya <skakit@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1620817988-18809-3-git-send-email-skakit@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-19pinctrl: qcom: spmi-mpp: Add compatible for pmi8994Bjorn Andersson1-0/+1
The PMI8994 has 4 multi-purpose-pins, add a compatible for this hardware block to the MPP driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210429003751.224232-1-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-19dt-bindings: pinctrl: convert Broadcom Northstar to the json-schemaRafał Miłecki2-55/+94
Important: this change converts the binding as it is. It includes dependency on undocumented CRU that must be refactored. CRU must get documented and offset property has to be reworked. Above can (and will be) be handled once every CRU MFD subdevice gets documented properly (including the pinmux). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210421182041.22636-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-05Merge tag 'gpio-updates-for-v5.13-v2' of ↵Linus Torvalds1-57/+1
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: - new driver for the Realtek Otto GPIO controller - ACPI support for gpio-mpc8xxx - edge event support for gpio-sch (+ Kconfig fixes) - Kconfig improvements in gpio-ich - fixes to older issues in gpio-mockup - ACPI quirk for ignoring EC wakeups on Dell Venue 10 Pro 5055 - improve the GPIO aggregator code by using more generic interfaces instead of reimplementing them in the driver - convert the DT bindings for gpio-74x164 to yaml - documentation improvements - a slew of other minor fixes and improvements to GPIO drivers * tag 'gpio-updates-for-v5.13-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (34 commits) dt-bindings: gpio: add YAML description for rockchip,gpio-bank gpio: mxs: remove useless function dt-bindings: gpio: fairchild,74hc595: Convert to json-schema gpio: it87: remove unused code gpio: 104-dio-48e: Fix coding style issues gpio: mpc8xxx: Add ACPI support gpio: ich: Switch to be dependent on LPC_ICH gpio: sch: Drop MFD_CORE selection gpio: sch: depends on LPC_SCH gpiolib: acpi: Add quirk to ignore EC wakeups on Dell Venue 10 Pro 5055 gpio: sch: Hook into ACPI GPE handler to catch GPIO edge events gpio: sch: Add edge event support gpio: aggregator: Replace custom get_arg() with a generic next_arg() lib/cmdline: Export next_arg() for being used in modules gpio: omap: Use device_get_match_data() helper gpio: Add Realtek Otto GPIO support dt-bindings: gpio: Binding for Realtek Otto GPIO docs: kernel-parameters: Add gpio_mockup_named_lines docs: kernel-parameters: Move gpio-mockup for alphabetic order lib: bitmap: provide devm_bitmap_alloc() and devm_bitmap_zalloc() ...
2021-05-05dt-bindings: gpio: add YAML description for rockchip,gpio-bankJohan Jonker1-57/+1
Current dts files with "rockchip,gpio-bank" subnodes are manually verified. In order to automate this process the text that describes the compatible in rockchip,pinctrl.txt is removed and converted to YAML in rockchip,gpio-bank.yaml. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-04-22dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driverSai Krishna Potthuri1-0/+336
Adding documentation and dt-bindings file which contains MIO pin configuration defines for Xilinx ZynqMP pinctrl driver. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1618485193-5403-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-22dt-bindings: pinctrl: mt8195: add pinctrl file and binding documentZhiyong Tao1-0/+151
1. This patch adds pinctrl file for mt8195. 2. This patch adds mt8195 compatible node in binding document. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210413055702.27535-2-zhiyong.tao@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-22dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.周琰杰 (Zhou Yanjie)1-4/+19
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC, the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1618757073-1724-8-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-14dt-bindings: pinctrl: rockchip: add RK3568 SoC supportEzequiel Garcia1-0/+1
Add RK3568/RK3566 SoC support to pinctrl. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210410204500.18091-1-ezequiel@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-09dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8008 supportGuru Das Srinagesh1-0/+2
Add support for the 2 GPIOs present on Qualcomm Technologies, Inc. PM8008. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org> Link: https://lore.kernel.org/r/2be34cc205ae96d40b04a9efdcf9287d5da9d1c0.1617901945.git.gurus@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-30Merge branch 'ib-bcm63xx' into develLinus Walleij6-0/+950
2021-03-29dt-bindings: add BCM6318 pincontroller binding documentationÁlvaro Fernández Rojas1-0/+143
Add binding documentation for the pincontrol core found in BCM6318 SoCs. Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210324081923.20379-21-noltari@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-29dt-bindings: add BCM63268 pincontroller binding documentationÁlvaro Fernández Rojas1-0/+164
Add binding documentation for the pincontrol core found in the BCM63268 family SoCs. Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210324081923.20379-18-noltari@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-29dt-bindings: add BCM6368 pincontroller binding documentationÁlvaro Fernández Rojas1-0/+217
Add binding documentation for the pincontrol core found in BCM6368 SoCs. Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210324081923.20379-15-noltari@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-29dt-bindings: add BCM6362 pincontroller binding documentationÁlvaro Fernández Rojas1-0/+206
Add binding documentation for the pincontrol core found in BCM6362 SoCs. Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210324081923.20379-12-noltari@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-29dt-bindings: add BCM6358 pincontroller binding documentationÁlvaro Fernández Rojas1-0/+93
Add binding documentation for the pincontrol core found in BCM6358 SoCs. Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210324081923.20379-9-noltari@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-16 21:02:03 +0300