diff options
Diffstat (limited to 'drivers/soc/renesas/rcar-sysc.c')
| -rw-r--r-- | drivers/soc/renesas/rcar-sysc.c | 45 |
1 files changed, 35 insertions, 10 deletions
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 79dbc770895f..65c8e1eb90c0 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -164,15 +164,6 @@ static bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch) return false; } -void __iomem *rcar_sysc_init(phys_addr_t base) -{ - rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); - if (!rcar_sysc_base) - panic("unable to ioremap R-Car SYSC hardware block\n"); - - return rcar_sysc_base; -} - struct rcar_sysc_pd { struct generic_pm_domain genpd; struct rcar_sysc_ch ch; @@ -293,6 +284,9 @@ static const struct of_device_id rcar_sysc_matches[] = { #ifdef CONFIG_ARCH_R8A7791 { .compatible = "renesas,r8a7791-sysc", .data = &r8a7791_sysc_info }, #endif +#ifdef CONFIG_ARCH_R8A7792 + { .compatible = "renesas,r8a7792-sysc", .data = &r8a7792_sysc_info }, +#endif #ifdef CONFIG_ARCH_R8A7793 /* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */ { .compatible = "renesas,r8a7793-sysc", .data = &r8a7791_sysc_info }, @@ -303,6 +297,9 @@ static const struct of_device_id rcar_sysc_matches[] = { #ifdef CONFIG_ARCH_R8A7795 { .compatible = "renesas,r8a7795-sysc", .data = &r8a7795_sysc_info }, #endif +#ifdef CONFIG_ARCH_R8A7796 + { .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info }, +#endif { /* sentinel */ } }; @@ -322,6 +319,9 @@ static int __init rcar_sysc_pd_init(void) unsigned int i; int error; + if (rcar_sysc_base) + return 0; + np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, &match); if (!np) return -ENODEV; @@ -392,10 +392,35 @@ static int __init rcar_sysc_pd_init(void) domains->domains[area->isr_bit] = &pd->genpd; } - of_genpd_add_provider_onecell(np, &domains->onecell_data); + error = of_genpd_add_provider_onecell(np, &domains->onecell_data); out_put: of_node_put(np); return error; } early_initcall(rcar_sysc_pd_init); + +void __init rcar_sysc_init(phys_addr_t base, u32 syscier) +{ + u32 syscimr; + + if (!rcar_sysc_pd_init()) + return; + + rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); + + /* + * Mask all interrupt sources to prevent the CPU from receiving them. + * Make sure not to clear reserved bits that were set before. + */ + syscimr = ioread32(rcar_sysc_base + SYSCIMR); + syscimr |= syscier; + pr_debug("%s: syscimr = 0x%08x\n", __func__, syscimr); + iowrite32(syscimr, rcar_sysc_base + SYSCIMR); + + /* + * SYSC needs all interrupt sources enabled to control power. + */ + pr_debug("%s: syscier = 0x%08x\n", __func__, syscier); + iowrite32(syscier, rcar_sysc_base + SYSCIER); +} |