diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/Kconfig | 40 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_eeprom.h | 1 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.c | 72 |
4 files changed, 29 insertions, 86 deletions
diff --git a/drivers/net/wireless/ath/ath9k/Kconfig b/drivers/net/wireless/ath/ath9k/Kconfig index 40fa915d6f35..f68cb00450e0 100644 --- a/drivers/net/wireless/ath/ath9k/Kconfig +++ b/drivers/net/wireless/ath/ath9k/Kconfig @@ -75,6 +75,26 @@ config ATH9K_STATION_STATISTICS ---help--- This option enables detailed statistics for association stations. +config ATH9K_TX99 + bool "Atheros ath9k TX99 testing support" + depends on ATH9K_DEBUGFS && CFG80211_CERTIFICATION_ONUS + default n + ---help--- + Say N. This should only be enabled on systems undergoing + certification testing and evaluation in a controlled environment. + Enabling this will only enable TX99 support, all other modes of + operation will be disabled. + + TX99 support enables Specific Absorption Rate (SAR) testing. + SAR is the unit of measurement for the amount of radio frequency(RF) + absorbed by the body when using a wireless device. The RF exposure + limits used are expressed in the terms of SAR, which is a measure + of the electric and magnetic field strength and power density for + transmitters operating at frequencies from 300 kHz to 100 GHz. + Regulatory bodies around the world require that wireless device + be evaluated to meet the RF exposure limits set forth in the + governmental SAR regulations. + config ATH9K_DFS_CERTIFIED bool "Atheros DFS support for certified platforms" depends on ATH9K && CFG80211_CERTIFICATION_ONUS @@ -103,26 +123,6 @@ config ATH9K_DYNACK based on ACK frame RX timestamp, TX frame timestamp and frame duration -config ATH9K_TX99 - bool "Atheros ath9k TX99 testing support" - depends on ATH9K_DEBUGFS && CFG80211_CERTIFICATION_ONUS - default n - ---help--- - Say N. This should only be enabled on systems undergoing - certification testing and evaluation in a controlled environment. - Enabling this will only enable TX99 support, all other modes of - operation will be disabled. - - TX99 support enables Specific Absorption Rate (SAR) testing. - SAR is the unit of measurement for the amount of radio frequency(RF) - absorbed by the body when using a wireless device. The RF exposure - limits used are expressed in the terms of SAR, which is a measure - of the electric and magnetic field strength and power density for - transmitters operating at frequencies from 300 kHz to 100 GHz. - Regulatory bodies around the world require that wireless device - be evaluated to meet the RF exposure limits set forth in the - governmental SAR regulations. - config ATH9K_WOW bool "Wake on Wireless LAN support (EXPERIMENTAL)" depends on ATH9K && PM diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index f68098284c43..dec1a317a070 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c @@ -4402,7 +4402,7 @@ static void ar9003_hw_selfgen_tpc_txpower(struct ath_hw *ah, } /* Set tx power registers to array of values passed in */ -static int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray) +int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray) { #define POW_SM(_r, _s) (((_r) & 0x3f) << (_s)) /* make sure forced gain is not set */ diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h index 694ca2e680e5..107bcfbbe0fb 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h @@ -355,5 +355,6 @@ unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah, struct ath9k_channel *chan); void ar9003_hw_internal_regulator_apply(struct ath_hw *ah); +int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray); #endif diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index be14a8e01916..ae3043559b6d 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -17,6 +17,7 @@ #include <linux/export.h> #include "hw.h" #include "ar9003_phy.h" +#include "ar9003_eeprom.h" #define AR9300_OFDM_RATES 8 #define AR9300_HT_SS_RATES 8 @@ -1009,7 +1010,7 @@ static void ar9003_hw_set_rfmode(struct ath_hw *ah, if (IS_CHAN_A_FAST_CLOCK(ah, chan)) rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); - if (rfMode & (AR_PHY_MODE_QUARTER | AR_PHY_MODE_HALF)) + if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, AR_PHY_FRAME_CTL_CF_OVERLAP_WINDOW, 3); @@ -1840,73 +1841,14 @@ static void ar9003_hw_tx99_stop(struct ath_hw *ah) static void ar9003_hw_tx99_set_txpower(struct ath_hw *ah, u8 txpower) { - static s16 p_pwr_array[ar9300RateSize] = { 0 }; + static u8 p_pwr_array[ar9300RateSize] = { 0 }; unsigned int i; - if (txpower <= MAX_RATE_POWER) { - for (i = 0; i < ar9300RateSize; i++) - p_pwr_array[i] = txpower; - } else { - for (i = 0; i < ar9300RateSize; i++) - p_pwr_array[i] = MAX_RATE_POWER; - } + txpower = txpower <= MAX_RATE_POWER ? txpower : MAX_RATE_POWER; + for (i = 0; i < ar9300RateSize; i++) + p_pwr_array[i] = txpower; - REG_WRITE(ah, 0xa458, 0); - - REG_WRITE(ah, 0xa3c0, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 0)); - REG_WRITE(ah, 0xa3c4, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_54], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_48], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_36], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 0)); - REG_WRITE(ah, 0xa3c8, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 0)); - REG_WRITE(ah, 0xa3cc, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11S], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11L], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_5S], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 0)); - REG_WRITE(ah, 0xa3d0, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_5], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_4], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_1_3_9_11_17_19], 8)| - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_0_8_16], 0)); - REG_WRITE(ah, 0xa3d4, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_13], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_12], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_7], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_6], 0)); - REG_WRITE(ah, 0xa3e4, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_21], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_20], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_15], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_14], 0)); - REG_WRITE(ah, 0xa3e8, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_23], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_22], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_23], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_22], 0)); - REG_WRITE(ah, 0xa3d8, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_5], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_4], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_1_3_9_11_17_19], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_0_8_16], 0)); - REG_WRITE(ah, 0xa3dc, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_13], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_12], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_7], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_6], 0)); - REG_WRITE(ah, 0xa3ec, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_21], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_20], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_15], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_14], 0)); + ar9003_hw_tx_power_regwrite(ah, p_pwr_array); } static void ar9003_hw_init_txpower_cck(struct ath_hw *ah, u8 *rate_array) |