diff options
Diffstat (limited to 'drivers/hwmon')
| -rw-r--r-- | drivers/hwmon/Kconfig | 22 | ||||
| -rw-r--r-- | drivers/hwmon/Makefile | 2 | ||||
| -rw-r--r-- | drivers/hwmon/adt7475.c | 340 | ||||
| -rw-r--r-- | drivers/hwmon/emc1403.c | 2 | ||||
| -rw-r--r-- | drivers/hwmon/iio_hwmon.c | 67 | ||||
| -rw-r--r-- | drivers/hwmon/k10temp.c | 8 | ||||
| -rw-r--r-- | drivers/hwmon/mlxreg-fan.c | 489 | ||||
| -rw-r--r-- | drivers/hwmon/nct6775.c | 6 | ||||
| -rw-r--r-- | drivers/hwmon/nct7904.c | 68 | ||||
| -rw-r--r-- | drivers/hwmon/npcm750-pwm-fan.c | 1057 | ||||
| -rw-r--r-- | drivers/hwmon/pmbus/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/hwmon/pmbus/max34440.c | 93 |
12 files changed, 1964 insertions, 192 deletions
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index f10840ad465c..ccf42663a908 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -937,6 +937,18 @@ config SENSORS_MCP3021 This driver can also be built as a module. If so, the module will be called mcp3021. +config SENSORS_MLXREG_FAN + tristate "Mellanox Mellanox FAN driver" + depends on MELLANOX_PLATFORM + imply THERMAL + select REGMAP + help + This option enables support for the FAN control on the Mellanox + Ethernet and InfiniBand switches. The driver can be activated by the + platform device add call. Say Y to enable these. To compile this + driver as a module, choose 'M' here: the module will be called + mlxreg-fan. + config SENSORS_TC654 tristate "Microchip TC654/TC655 and compatibles" depends on I2C @@ -1256,6 +1268,16 @@ config SENSORS_NCT7904 This driver can also be built as a module. If so, the module will be called nct7904. +config SENSORS_NPCM7XX + tristate "Nuvoton NPCM750 and compatible PWM and Fan controllers" + imply THERMAL + help + This driver provides support for Nuvoton NPCM750/730/715/705 PWM + and Fan controllers. + + This driver can also be built as a module. If so, the module + will be called npcm750-pwm-fan. + config SENSORS_NSA320 tristate "ZyXEL NSA320 and compatible fan speed and temperature sensors" depends on GPIOLIB && OF diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index e7d52a36e6c4..842c92f83ce6 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -129,11 +129,13 @@ obj-$(CONFIG_SENSORS_MAX31790) += max31790.o obj-$(CONFIG_SENSORS_MC13783_ADC)+= mc13783-adc.o obj-$(CONFIG_SENSORS_MCP3021) += mcp3021.o obj-$(CONFIG_SENSORS_TC654) += tc654.o +obj-$(CONFIG_SENSORS_MLXREG_FAN) += mlxreg-fan.o obj-$(CONFIG_SENSORS_MENF21BMC_HWMON) += menf21bmc_hwmon.o obj-$(CONFIG_SENSORS_NCT6683) += nct6683.o obj-$(CONFIG_SENSORS_NCT6775) += nct6775.o obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o +obj-$(CONFIG_SENSORS_NPCM7XX) += npcm750-pwm-fan.o obj-$(CONFIG_SENSORS_NSA320) += nsa320-hwmon.o obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o obj-$(CONFIG_SENSORS_PC87360) += pc87360.o diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c index 9ef84998c7f3..90837f7c7d0f 100644 --- a/drivers/hwmon/adt7475.c +++ b/drivers/hwmon/adt7475.c @@ -194,8 +194,7 @@ struct adt7475_data { struct mutex lock; unsigned long measure_updated; - unsigned long limits_updated; - char valid; + bool valid; u8 config4; u8 config5; @@ -326,6 +325,9 @@ static ssize_t show_voltage(struct device *dev, struct device_attribute *attr, struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); unsigned short val; + if (IS_ERR(data)) + return PTR_ERR(data); + switch (sattr->nr) { case ALARM: return sprintf(buf, "%d\n", @@ -381,6 +383,9 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *attr, struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); int out; + if (IS_ERR(data)) + return PTR_ERR(data); + switch (sattr->nr) { case HYSTERSIS: mutex_lock(&data->lock); @@ -625,6 +630,9 @@ static ssize_t show_point2(struct device *dev, struct device_attribute *attr, struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); int out, val; + if (IS_ERR(data)) + return PTR_ERR(data); + mutex_lock(&data->lock); out = (data->range[sattr->index] >> 4) & 0x0F; val = reg2temp(data, data->temp[AUTOMIN][sattr->index]); @@ -683,6 +691,9 @@ static ssize_t show_tach(struct device *dev, struct device_attribute *attr, struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); int out; + if (IS_ERR(data)) + return PTR_ERR(data); + if (sattr->nr == ALARM) out = (data->alarms >> (sattr->index + 10)) & 1; else @@ -720,6 +731,9 @@ static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, struct adt7475_data *data = adt7475_update_device(dev); struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); + if (IS_ERR(data)) + return PTR_ERR(data); + return sprintf(buf, "%d\n", data->pwm[sattr->nr][sattr->index]); } @@ -729,6 +743,9 @@ static ssize_t show_pwmchan(struct device *dev, struct device_attribute *attr, struct adt7475_data *data = adt7475_update_device(dev); struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); + if (IS_ERR(data)) + return PTR_ERR(data); + return sprintf(buf, "%d\n", data->pwmchan[sattr->index]); } @@ -738,6 +755,9 @@ static ssize_t show_pwmctrl(struct device *dev, struct device_attribute *attr, struct adt7475_data *data = adt7475_update_device(dev); struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); + if (IS_ERR(data)) + return PTR_ERR(data); + return sprintf(buf, "%d\n", data->pwmctl[sattr->index]); } @@ -945,6 +965,9 @@ static ssize_t show_pwmfreq(struct device *dev, struct device_attribute *attr, int i = clamp_val(data->range[sattr->index] & 0xf, 0, ARRAY_SIZE(pwmfreq_table) - 1); + if (IS_ERR(data)) + return PTR_ERR(data); + return sprintf(buf, "%d\n", pwmfreq_table[i]); } @@ -1035,6 +1058,10 @@ static ssize_t cpu0_vid_show(struct device *dev, struct device_attribute *devattr, char *buf) { struct adt7475_data *data = adt7475_update_device(dev); + + if (IS_ERR(data)) + return PTR_ERR(data); + return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); } @@ -1385,6 +1412,121 @@ static void adt7475_remove_files(struct i2c_client *client, sysfs_remove_group(&client->dev.kobj, &vid_attr_group); } +static int adt7475_update_limits(struct i2c_client *client) +{ + struct adt7475_data *data = i2c_get_clientdata(client); + int i; + int ret; + + ret = adt7475_read(REG_CONFIG4); + if (ret < 0) + return ret; + data->config4 = ret; + + ret = adt7475_read(REG_CONFIG5); + if (ret < 0) + return ret; + data->config5 = ret; + + for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) { + if (!(data->has_voltage & (1 << i))) + continue; + /* Adjust values so they match the input precision */ + ret = adt7475_read(VOLTAGE_MIN_REG(i)); + if (ret < 0) + return ret; + data->voltage[MIN][i] = ret << 2; + + ret = adt7475_read(VOLTAGE_MAX_REG(i)); + if (ret < 0) + return ret; + data->voltage[MAX][i] = ret << 2; + } + + if (data->has_voltage & (1 << 5)) { + ret = adt7475_read(REG_VTT_MIN); + if (ret < 0) + return ret; + data->voltage[MIN][5] = ret << 2; + + ret = adt7475_read(REG_VTT_MAX); + if (ret < 0) + return ret; + data->voltage[MAX][5] = ret << 2; + } + + for (i = 0; i < ADT7475_TEMP_COUNT; i++) { + /* Adjust values so they match the input precision */ + ret = adt7475_read(TEMP_MIN_REG(i)); + if (ret < 0) + return ret; + data->temp[MIN][i] = ret << 2; + + ret = adt7475_read(TEMP_MAX_REG(i)); + if (ret < 0) + return ret; + data->temp[MAX][i] = ret << 2; + + ret = adt7475_read(TEMP_TMIN_REG(i)); + if (ret < 0) + return ret; + data->temp[AUTOMIN][i] = ret << 2; + + ret = adt7475_read(TEMP_THERM_REG(i)); + if (ret < 0) + return ret; + data->temp[THERM][i] = ret << 2; + + ret = adt7475_read(TEMP_OFFSET_REG(i)); + if (ret < 0) + return ret; + data->temp[OFFSET][i] = ret; + } + adt7475_read_hystersis(client); + + for (i = 0; i < ADT7475_TACH_COUNT; i++) { + if (i == 3 && !data->has_fan4) + continue; + ret = adt7475_read_word(client, TACH_MIN_REG(i)); + if (ret < 0) + return ret; + data->tach[MIN][i] = ret; + } + + for (i = 0; i < ADT7475_PWM_COUNT; i++) { + if (i == 1 && !data->has_pwm2) + continue; + ret = adt7475_read(PWM_MAX_REG(i)); + if (ret < 0) + return ret; + data->pwm[MAX][i] = ret; + + ret = adt7475_read(PWM_MIN_REG(i)); + if (ret < 0) + return ret; + data->pwm[MIN][i] = ret; + /* Set the channel and control information */ + adt7475_read_pwm(client, i); + } + + ret = adt7475_read(TEMP_TRANGE_REG(0)); + if (ret < 0) + return ret; + data->range[0] = ret; + + ret = adt7475_read(TEMP_TRANGE_REG(1)); + if (ret < 0) + return ret; + data->range[1] = ret; + + ret = adt7475_read(TEMP_TRANGE_REG(2)); + if (ret < 0) + return ret; + data->range[2] = ret; + + return 0; +} + static int adt7475_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -1562,6 +1704,11 @@ static int adt7475_probe(struct i2c_client *client, (data->bypass_attn & (1 << 3)) ? " in3" : "", (data->bypass_attn & (1 << 4)) ? " in4" : ""); + /* Limits and settings, should never change update more than once */ + ret = adt7475_update_limits(client); + if (ret) + goto eremove; + return 0; eremove: @@ -1658,121 +1805,122 @@ static void adt7475_read_pwm(struct i2c_client *client, int index) } } -static struct adt7475_data *adt7475_update_device(struct device *dev) +static int adt7475_update_measure(struct device *dev) { struct i2c_client *client = to_i2c_client(dev); struct adt7475_data *data = i2c_get_clientdata(client); u16 ext; int i; + int ret; - mutex_lock(&data->lock); + ret = adt7475_read(REG_STATUS2); + if (ret < 0) + return ret; + data->alarms = ret << 8; - /* Measurement values update every 2 seconds */ - if (time_after(jiffies, data->measure_updated + HZ * 2) || - !data->valid) { - data->alarms = adt7475_read(REG_STATUS2) << 8; - data->alarms |= adt7475_read(REG_STATUS1); - - ext = (adt7475_read(REG_EXTEND2) << 8) | - adt7475_read(REG_EXTEND1); - for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) { - if (!(data->has_voltage & (1 << i))) - continue; - data->voltage[INPUT][i] = - (adt7475_read(VOLTAGE_REG(i)) << 2) | - ((ext >> (i * 2)) & 3); - } + ret = adt7475_read(REG_STATUS1); + if (ret < 0) + return ret; + data->alarms |= ret; - for (i = 0; i < ADT7475_TEMP_COUNT; i++) - data->temp[INPUT][i] = - (adt7475_read(TEMP_REG(i)) << 2) | - ((ext >> ((i + 5) * 2)) & 3); + ret = adt7475_read(REG_EXTEND2); + if (ret < 0) + return ret; - if (data->has_voltage & (1 << 5)) { - data->alarms |= adt7475_read(REG_STATUS4) << 24; - ext = adt7475_read(REG_EXTEND3); - data->voltage[INPUT][5] = adt7475_read(REG_VTT) << 2 | - ((ext >> 4) & 3); - } + ext = (ret << 8); - for (i = 0; i < ADT7475_TACH_COUNT; i++) { - if (i == 3 && !data->has_fan4) - continue; - data->tach[INPUT][i] = - adt7475_read_word(client, TACH_REG(i)); - } + ret = adt7475_read(REG_EXTEND1); + if (ret < 0) + return ret; - /* Updated by hw when in auto mode */ - for (i = 0; i < ADT7475_PWM_COUNT; i++) { - if (i == 1 && !data->has_pwm2) - continue; - data->pwm[INPUT][i] = adt7475_read(PWM_REG(i)); - } + ext |= ret; + + for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) { + if (!(data->has_voltage & (1 << i))) + continue; + ret = adt7475_read(VOLTAGE_REG(i)); + if (ret < 0) + return ret; + data->voltage[INPUT][i] = + (ret << 2) | + ((ext >> (i * 2)) & 3); + } - if (data->has_vid) - data->vid = adt7475_read(REG_VID) & 0x3f; + for (i = 0; i < ADT7475_TEMP_COUNT; i++) { + ret = adt7475_read(TEMP_REG(i)); + if (ret < 0) + return ret; + data->temp[INPUT][i] = + (ret << 2) | + ((ext >> ((i + 5) * 2)) & 3); + } - data->measure_updated = jiffies; + if (data->has_voltage & (1 << 5)) { + ret = adt7475_read(REG_STATUS4); + if (ret < 0) + return ret; + data->alarms |= ret << 24; + + ret = adt7475_read(REG_EXTEND3); + if (ret < 0) + return ret; + ext = ret; + + ret = adt7475_read(REG_VTT); + if (ret < 0) + return ret; + data->voltage[INPUT][5] = ret << 2 | + ((ext >> 4) & 3); } - /* Limits and settings, should never change update every 60 seconds */ - if (time_after(jiffies, data->limits_updated + HZ * 60) || - !data->valid) { - data->config4 = adt7475_read(REG_CONFIG4); - data->config5 = adt7475_read(REG_CONFIG5); - - for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) { - if (!(data->has_voltage & (1 << i))) - continue; - /* Adjust values so they match the input precision */ - data->voltage[MIN][i] = - adt7475_read(VOLTAGE_MIN_REG(i)) << 2; - data->voltage[MAX][i] = - adt7475_read(VOLTAGE_MAX_REG(i)) << 2; - } + for (i = 0; i < ADT7475_TACH_COUNT; i++) { + if (i == 3 && !data->has_fan4) + continue; + ret = adt7475_read_word(client, TACH_REG(i)); + if (ret < 0) + return ret; + data->tach[INPUT][i] = ret; + } - if (data->has_voltage & (1 << 5)) { - data->voltage[MIN][5] = adt7475_read(REG_VTT_MIN) << 2; - data->voltage[MAX][5] = adt7475_read(REG_VTT_MAX) << 2; - } + /* Updated by hw when in auto mode */ + for (i = 0; i < ADT7475_PWM_COUNT; i++) { + if (i == 1 && !data->has_pwm2) + continue; + ret = adt7475_read(PWM_REG(i)); + if (ret < 0) + return ret; + data->pwm[INPUT][i] = ret; + } - for (i = 0; i < ADT7475_TEMP_COUNT; i++) { - /* Adjust values so they match the input precision */ - data->temp[MIN][i] = - adt7475_read(TEMP_MIN_REG(i)) << 2; - data->temp[MAX][i] = - adt7475_read(TEMP_MAX_REG(i)) << 2; - data->temp[AUTOMIN][i] = - adt7475_read(TEMP_TMIN_REG(i)) << 2; - data->temp[THERM][i] = - adt7475_read(TEMP_THERM_REG(i)) << 2; - data->temp[OFFSET][i] = - adt7475_read(TEMP_OFFSET_REG(i)); - } - adt7475_read_hystersis(client); + if (data->has_vid) { + ret = adt7475_read(REG_VID); + if (ret < 0) + return ret; + data->vid = ret & 0x3f; + } - for (i = 0; i < ADT7475_TACH_COUNT; i++) { - if (i == 3 && !data->has_fan4) - continue; - data->tach[MIN][i] = - adt7475_read_word(client, TACH_MIN_REG(i)); - } + return 0; +} - for (i = 0; i < ADT7475_PWM_COUNT; i++) { - if (i == 1 && !data->has_pwm2) - continue; - data->pwm[MAX][i] = adt7475_read(PWM_MAX_REG(i)); - data->pwm[MIN][i] = adt7475_read(PWM_MIN_REG(i)); - /* Set the channel and control information */ - adt7475_read_pwm(client, i); - } +static struct adt7475_data *adt7475_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct adt7475_data *data = i2c_get_clientdata(client); + int ret; - data->range[0] = adt7475_read(TEMP_TRANGE_REG(0)); - data->range[1] = adt7475_read(TEMP_TRANGE_REG(1)); - data->range[2] = adt7475_read(TEMP_TRANGE_REG(2)); + mutex_lock(&data->lock); - data->limits_updated = jiffies; - data->valid = 1; + /* Measurement values update every 2 seconds */ + if (time_after(jiffies, data->measure_updated + HZ * 2) || + !data->valid) { + ret = adt7475_update_measure(dev); + if (ret) { + data->valid = false; + mutex_unlock(&data->lock); + return ERR_PTR(ret); + } + data->measure_updated = jiffies; + data->valid = true; } mutex_unlock(&data->lock); diff --git a/drivers/hwmon/emc1403.c b/drivers/hwmon/emc1403.c index 1ea7ca510f84..aaebeb726d6a 100644 --- a/drivers/hwmon/emc1403.c +++ b/drivers/hwmon/emc1403.c @@ -443,8 +443,10 @@ static int emc1403_probe(struct i2c_client *client, switch (id->driver_data) { case emc1404: data->groups[2] = &emc1404_group; + /* fall through */ case emc1403: data->groups[1] = &emc1403_group; + /* fall through */ case emc1402: data->groups[0] = &emc1402_group; } diff --git a/drivers/hwmon/iio_hwmon.c b/drivers/hwmon/iio_hwmon.c index 69031a0f7ed2..2f3f875c06ac 100644 --- a/drivers/hwmon/iio_hwmon.c +++ b/drivers/hwmon/iio_hwmon.c @@ -22,7 +22,6 @@ * struct iio_hwmon_state - device instance state * @channels: filled with array of channels from iio * @num_channels: number of channels in channels (saves counting twice) - * @hwmon_dev: associated hwmon device * @attr_group: the group of attributes * @groups: null terminated array of attribute groups * @attrs: null terminated array of attribute pointers. @@ -30,7 +29,6 @@ struct iio_hwmon_state { struct iio_channel *channels; int num_channels; - struct device *hwmon_dev; struct attribute_group attr_group; const struct attribute_group *groups[2]; struct attribute **attrs; @@ -68,12 +66,13 @@ static int iio_hwmon_probe(struct platform_device *pdev) enum iio_chan_type type; struct iio_channel *channels; const char *name = "iio_hwmon"; + struct device *hwmon_dev; char *sname; if (dev->of_node && dev->of_node->name) name = dev->of_node->name; - channels = iio_channel_get_all(dev); + channels = devm_iio_channel_get_all(dev); if (IS_ERR(channels)) { if (PTR_ERR(channels) == -ENODEV) return -EPROBE_DEFER; @@ -81,10 +80,8 @@ static int iio_hwmon_probe(struct platform_device *pdev) } st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL); - if (st == NULL) { - ret = -ENOMEM; - goto error_release_channels; - } + if (st == NULL) + return -ENOMEM; st->channels = channels; @@ -95,22 +92,18 @@ static int iio_hwmon_probe(struct platform_device *pdev) st->attrs = devm_kcalloc(dev, st->num_channels + 1, sizeof(*st->attrs), GFP_KERNEL); - if (st->attrs == NULL) { - ret = -ENOMEM; - goto error_release_channels; - } + if (st->attrs == NULL) + return -ENOMEM; for (i = 0; i < st->num_channels; i++) { a = devm_kzalloc(dev, sizeof(*a), GFP_KERNEL); - if (a == NULL) { - ret = -ENOMEM; - goto error_release_channels; - } + if (a == NULL) + return -ENOMEM; sysfs_attr_init(&a->dev_attr.attr); ret = iio_get_channel_type(&st->channels[i], &type); if (ret < 0) - goto error_release_channels; + return ret; switch (type) { case IIO_VOLTAGE: @@ -134,13 +127,11 @@ static int iio_hwmon_probe(struct platform_device *pdev) humidity_i++); break; default: - ret = -EINVAL; - goto error_release_channels; - } - if (a->dev_attr.attr.name == NULL) { - ret = -ENOMEM; - goto error_release_channels; + return -EINVAL; } + if (a->dev_attr.attr.name == NULL) + return -ENOMEM; + a->dev_attr.show = iio_hwmon_read_val; a->dev_attr.attr.mode = S_IRUGO; a->index = i; @@ -151,34 +142,13 @@ static int iio_hwmon_probe(struct platform_device *pdev) st->groups[0] = &st->attr_group; sname = devm_kstrdup(dev, name, GFP_KERNEL); - if (!sname) { - ret = -ENOMEM; - goto error_release_channels; - } + if (!sname) + return -ENOMEM; strreplace(sname, '-', '_'); - st->hwmon_dev = hwmon_device_register_with_groups(dev, sname, st, - st->groups); - if (IS_ERR(st->hwmon_dev)) { - ret = PTR_ERR(st->hwmon_dev); - goto error_release_channels; - } - platform_set_drvdata(pdev, st); - return 0; - -error_release_channels: - iio_channel_release_all(channels); - return ret; -} - -static int iio_hwmon_remove(struct platform_device *pdev) -{ - struct iio_hwmon_state *st = platform_get_drvdata(pdev); - - hwmon_device_unregister(st->hwmon_dev); - iio_channel_release_all(st->channels); - - return 0; + hwmon_dev = devm_hwmon_device_register_with_groups(dev, sname, st, + st->groups); + return PTR_ERR_OR_ZERO(hwmon_dev); } static const struct of_device_id iio_hwmon_of_match[] = { @@ -193,7 +163,6 @@ static struct platform_driver __refdata iio_hwmon_driver = { .of_match_table = iio_hwmon_of_match, }, .probe = iio_hwmon_probe, - .remove = iio_hwmon_remove, }; module_platform_driver(iio_hwmon_driver); diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index 17c6460ae351..bb15d7816a29 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -99,12 +99,8 @@ static const struct tctl_offset tctl_offset_table[] = { { 0x17, "AMD Ryzen 7 1700X", 20000 }, { 0x17, "AMD Ryzen 7 1800X", 20000 }, { 0x17, "AMD Ryzen 7 2700X", 10000 }, - { 0x17, "AMD Ryzen Threadripper 1950X", 27000 }, - { 0x17, "AMD Ryzen Threadripper 1920X", 27000 }, - { 0x17, "AMD Ryzen Threadripper 1900X", 27000 }, - { 0x17, "AMD Ryzen Threadripper 1950", 10000 }, - { 0x17, "AMD Ryzen Threadripper 1920", 10000 }, - { 0x17, "AMD Ryzen Threadripper 1910", 10000 }, + { 0x17, "AMD Ryzen Threadripper 19", 27000 }, /* 19{00,20,50}X */ + { 0x17, "AMD Ryzen Threadripper 29", 27000 }, /* 29{20,50,70,90}[W]X */ }; static void read_htcreg_pci(struct pci_dev *pdev, u32 *regval) diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c new file mode 100644 index 000000000000..de46577c7d5a --- /dev/null +++ b/drivers/hwmon/mlxreg-fan.c @@ -0,0 +1,489 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +// +// Copyright (c) 2018 Mellanox Technologies. All rights reserved. +// Copyright (c) 2018 Vadim Pasternak <vadimp@mellanox.com> + +#include <linux/bitops.h> +#include <linux/device.h> +#include <linux/hwmon.h> +#include <linux/module.h> +#include <linux/platform_data/mlxreg.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/thermal.h> + +#define MLXREG_FAN_MAX_TACHO 12 +#define MLXREG_FAN_MAX_STATE 10 +#define MLXREG_FAN_MIN_DUTY 51 /* 20% */ +#define MLXREG_FAN_MAX_DUTY 255 /* 100% */ +/* + * Minimum and maximum FAN allowed speed in percent: from 20% to 100%. Values + * MLXREG_FAN_MAX_STATE + x, where x is between 2 and 10 are used for + * setting FAN speed dynamic minimum. For example, if value is set to 14 (40%) + * cooling levels vector will be set to 4, 4, 4, 4, 4, 5, 6, 7, 8, 9, 10 to + * introduce PWM speed in percent: 40, 40, 40, 40, 40, 50, 60. 70, 80, 90, 100. + */ +#define MLXREG_FAN_SPEED_MIN (MLXREG_FAN_MAX_STATE + 2) +#define MLXREG_FAN_SPEED_MAX (MLXREG_FAN_MAX_STATE * 2) +#define MLXREG_FAN_SPEED_MIN_LEVEL 2 /* 20 percent */ +#define MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF 44 +#define MLXREG_FAN_TACHO_DIVIDER_DEF 1132 +/* + * FAN datasheet defines the formula for RPM calculations as RPM = 15/t-high. + * The logic in a programmable device measures the time t-high by sampling the + * tachometer every t-sample (with the default value 11.32 uS) and increment + * a counter (N) as long as the pulse has not change: + * RPM = 15 / (t-sample * (K + Regval)), where: + * Regval: is the value read from the programmable device register; + * - 0xff - represents tachometer fault; + * - 0xfe - represents tachometer minimum value , which is 4444 RPM; + * - 0x00 - represents tachometer maximum value , which is 300000 RPM; + * K: is 44 and it represents the minimum allowed samples per pulse; + * N: is equal K + Regval; + * In order to calculate RPM from the register value the following formula is + * used: RPM = 15 / ((Regval + K) * 11.32) * 10^(-6)), which in the + * default case is modified to: + * RPM = 15000000 * 100 / ((Regval + 44) * 1132); + * - for Regval 0x00, RPM will be 15000000 * 100 / (44 * 1132) = 30115; + * - for Regval 0xfe, RPM will be 15000000 * 100 / ((254 + 44) * 1132) = 4446; + * In common case the formula is modified to: + * RPM = 15000000 * 100 / ((Regval + samples) * divider). + */ +#define MLXREG_FAN_GET_RPM(rval, d, s) (DIV_ROUND_CLOSEST(15000000 * 100, \ + ((rval) + (s)) * (d))) +#define MLXREG_FAN_GET_FAULT(val, mask) (!!((val) ^ (mask))) +#define MLXREG_FAN_PWM_DUTY2STATE(duty) (DIV_ROUND_CLOSEST((duty) * \ + MLXREG_FAN_MAX_STATE, \ + MLXREG_FAN_MAX_DUTY)) +#define MLXREG_FAN_PWM_STATE2DUTY(stat) (DIV_ROUND_CLOSEST((stat) * \ + MLXREG_FAN_MAX_DUTY, \ + MLXREG_FAN_MAX_STATE)) + +/* + * struct mlxreg_fan_tacho - tachometer data (internal use): + * + * @connected: indicates if tachometer is connected; + * @reg: register offset; + * @mask: fault mask; + */ +struct mlxreg_fan_tacho { + bool connected; + u32 reg; + u32 mask; +}; + +/* + * struct mlxreg_fan_pwm - PWM data (internal use): + * + * @connected: indicates if PWM is connected; + * @reg: register offset; + */ +struct mlxreg_fan_pwm { + bool connected; + u32 reg; +}; + +/* + * struct mlxreg_fan - private data (internal use): + * + * @dev: basic device; + * @regmap: register map of parent device; + * @tacho: tachometer data; + * @pwm: PWM data; + * @samples: minimum allowed samples per pulse; + * @divider: divider value for tachometer RPM calculation; + * @cooling: cooling device levels; + * @cdev: cooling device; + */ +struct mlxreg_fan { + struct device *dev; + void *regmap; + struct mlxreg_core_platform_data *pdata; + struct mlxreg_fan_tacho tacho[MLXREG_FAN_MAX_TACHO]; + struct mlxreg_fan_pwm pwm; + int samples; + int divider; + u8 cooling_levels[MLXREG_FAN_MAX_STATE + 1]; + struct thermal_cooling_device *cdev; +}; + +static int +mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, + int channel, long *val) +{ + struct mlxreg_fan *fan = dev_get_drvdata(dev); + struct mlxreg_fan_tacho *tacho; + u32 regval; + int err; + + switch (type) { + case hwmon_fan: + tacho = &fan->tacho[channel]; + switch (attr) { + case hwmon_fan_input: + err = regmap_read(fan->regmap, tacho->reg, ®val); + if (err) + return err; + + *val = MLXREG_FAN_GET_RPM(regval, fan->divider, + fan->samples); + break; + + case hwmon_fan_fault: + err = regmap_read(fan->regmap, tacho->reg, ®val); + if (err) + return err; + + *val = MLXREG_FAN_GET_FAULT(regval, tacho->mask); + break; + + default: + return -EOPNOTSUPP; + } + break; + + case hwmon_pwm: + switch (attr) { + case hwmon_pwm_input: + err = regmap_read(fan->regmap, fan->pwm.reg, ®val); + if (err) + return err; + + *val = regval; + break; + + default: + return -EOPNOTSUPP; + } + break; + + default: + return -EOPNOTSUPP; + } + + return 0; +} + +static int +mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, + int channel, long val) +{ + struct mlxreg_fan *fan = dev_get_drvdata(dev); + + switch (type) { + case hwmon_pwm: + switch (attr) { + case hwmon_pwm_input: + if (val < MLXREG_FAN_MIN_DUTY || + val > MLXREG_FAN_MAX_DUTY) + return -EINVAL; + return regmap_write(fan->regmap, fan->pwm.reg, val); + default: + return -EOPNOTSUPP; + } + break; + + default: + return -EOPNOTSUPP; + } + + return -EOPNOTSUPP; +} + +static umode_t +mlxreg_fan_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, + int channel) +{ + switch (type) { + case hwmon_fan: + if (!(((struct mlxreg_fan *)data)->tacho[channel].connected)) + return 0; + + switch (attr) { + case hwmon_fan_input: + case hwmon_fan_fault: + return 0444; + default: + break; + } + break; + + case hwmon_pwm: + if (!(((struct mlxreg_fan *)data)->pwm.connected)) + return 0; + + switch (attr) { + case hwmon_pwm_input: + return 0644; + default: + break; + } + break; + + default: + break; + } + + return 0; +} + +static const u32 mlxreg_fan_hwmon_fan_config[] = { + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + 0 +}; + +static const struct hwmon_channel_info mlxreg_fan_hwmon_fan = { + .type = hwmon_fan, + .config = mlxreg_fan_hwmon_fan_config, +}; + +static const u32 mlxreg_fan_hwmon_pwm_config[] = { + HWMON_PWM_INPUT, + 0 +}; + +static const struct hwmon_channel_info mlxreg_fan_hwmon_pwm = { + .type = hwmon_pwm, + .config = mlxreg_fan_hwmon_pwm_config, +}; + +static const struct hwmon_channel_info *mlxreg_fan_hwmon_info[] = { + &mlxreg_fan_hwmon_fan, + &mlxreg_fan_hwmon_pwm, + NULL +}; + +static const struct hwmon_ops mlxreg_fan_hwmon_hwmon_ops = { + .is_visible = mlxreg_fan_is_visible, + .read = mlxreg_fan_read, + .write = mlxreg_fan_write, +}; + +static const struct hwmon_chip_info mlxreg_fan_hwmon_chip_info = { + .ops = &mlxreg_fan_hwmon_hwmon_ops, + .info = mlxreg_fan_hwmon_info, +}; + +static int mlxreg_fan_get_max_state(struct thermal_cooling_device *cdev, + unsigned long *state) +{ + *state = MLXREG_FAN_MAX_STATE; + return 0; +} + +static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev, + unsigned long *state) + +{ + struct mlxreg_fan *fan = cdev->devdata; + u32 regval; + int err; + + err = regmap_read(fan->regmap, fan->pwm.reg, ®val); + if (err) { + dev_err(fan->dev, "Failed to query PWM duty\n"); + return err; + } + + *state = MLXREG_FAN_PWM_DUTY2STATE(regval); + + return 0; +} + +static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, + unsigned long state) + +{ + struct mlxreg_fan *fan = cdev->devdata; + unsigned long cur_state; + u32 regval; + int i; + int err; + + /* + * Verify if this request is for changing allowed FAN dynamical + * minimum. If it is - update cooling levels accordingly and update + * state, if current state is below the newly requested minimum state. + * For example, if current state is 5, and minimal state is to be + * changed from 4 to 6, fan->cooling_levels[0 to 5] will be changed all + * from 4 to 6. And state 5 (fan->cooling_levels[4]) should be + * overwritten. + */ + if (state >= MLXREG_FAN_SPEED_MIN && state <= MLXREG_FAN_SPEED_MAX) { + state -= MLXREG_FAN_MAX_STATE; + for (i = 0; i < state; i++) + fan->cooling_levels[i] = state; + for (i = state; i <= MLXREG_FAN_MAX_STATE; i++) + fan->cooling_levels[i] = i; + + err = regmap_read(fan->regmap, fan->pwm.reg, ®val); + if (err) { + dev_err(fan->dev, "Failed to query PWM duty\n"); + return err; + } + + cur_state = MLXREG_FAN_PWM_DUTY2STATE(regval); + if (state < cur_state) + return 0; + + state = cur_state; + } + + if (state > MLXREG_FAN_MAX_STATE) + return -EINVAL; + + /* Normalize the state to the valid speed range. */ + state = fan->cooling_levels[state]; + err = regmap_write(fan->regmap, fan->pwm.reg, + MLXREG_FAN_PWM_STATE2DUTY(state)); + if (err) { + dev_err(fan->dev, "Failed to write PWM duty\n"); + return err; + } + return 0; +} + +static const struct thermal_cooling_device_ops mlxreg_fan_cooling_ops = { + .get_max_state = mlxreg_fan_get_max_state, + .get_cur_state = mlxreg_fan_get_cur_state, + .set_cur_state = mlxreg_fan_set_cur_state, +}; + +static int mlxreg_fan_config(struct mlxreg_fan *fan, + struct mlxreg_core_platform_data *pdata) +{ + struct mlxreg_core_data *data = pdata->data; + bool configured = false; + int tacho_num = 0, i; + + fan->samples = MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF; + fan->divider = MLXREG_FAN_TACHO_DIVIDER_DEF; + for (i = 0; i < pdata->counter; i++, data++) { + if (strnstr(data->label, "tacho", sizeof(data->label))) { + if (tacho_num == MLXREG_FAN_MAX_TACHO) { + dev_err(fan->dev, "too many tacho entries: %s\n", + data->label); + return -EINVAL; + } + fan->tacho[tacho_num].reg = data->reg; + fan->tacho[tacho_num].mask = data->mask; + fan->tacho[tacho_num++].connected = true; + } else if (strnstr(data->label, "pwm", sizeof(data->label))) { + if (fan->pwm.connected) { + dev_err(fan->dev, "duplicate pwm entry: %s\n", + data->label); + return -EINVAL; + } + fan->pwm.reg = data->reg; + fan->pwm.connected = true; + } else if (strnstr(data->label, "conf", sizeof(data->label))) { + if (configured) { + dev_err(fan->dev, "duplicate conf entry: %s\n", + data->label); + return -EINVAL; + } + /* Validate that conf parameters are not zeros. */ + if (!data->mask || !data->bit) { + dev_err(fan->dev, "invalid conf entry params: %s\n", + data->label); + return -EINVAL; + } + fan->samples = data->mask; + fan->divider = data->bit; + configured = true; + } else { + dev_err(fan->dev, "invalid label: %s\n", data->label); + return -EINVAL; + } + } + + /* Init cooling levels per PWM state. */ + for (i = 0; i < MLXREG_FAN_SPEED_MIN_LEVEL; i++) + fan->cooling_levels[i] = MLXREG_FAN_SPEED_MIN_LEVEL; + for (i = MLXREG_FAN_SPEED_MIN_LEVEL; i <= MLXREG_FAN_MAX_STATE; i++) + fan->cooling_levels[i] = i; + + return 0; +} + +static int mlxreg_fan_probe(struct platform_device *pdev) +{ + struct mlxreg_core_platform_data *pdata; + struct mlxreg_fan *fan; + struct device *hwm; + int err; + + pdata = dev_get_platdata(&pdev->dev); + if (!pdata) { + dev_err(&pdev->dev, "Failed to get platform data.\n"); + return -EINVAL; + } + + fan = devm_kzalloc(&pdev->dev, sizeof(*fan), GFP_KERNEL); + if (!fan) + return -ENOMEM; + + fan->dev = &pdev->dev; + fan->regmap = pdata->regmap; + platform_set_drvdata(pdev, fan); + + err = mlxreg_fan_config(fan, pdata); + if (err) + return err; + + hwm = devm_hwmon_device_register_with_info(&pdev->dev, "mlxreg_fan", + fan, + &mlxreg_fan_hwmon_chip_info, + NULL); + if (IS_ERR(hwm)) { + dev_err(&pdev->dev, "Failed to register hwmon device\n"); + return PTR_ERR(hwm); + } + + if (IS_REACHABLE(CONFIG_THERMAL)) { + fan->cdev = thermal_cooling_device_register("mlxreg_fan", fan, + &mlxreg_fan_cooling_ops); + if (IS_ERR(fan->cdev)) { + dev_err(&pdev->dev, "Failed to register cooling device\n"); + return PTR_ERR(fan->cdev); + } + } + + return 0; +} + +static int mlxreg_fan_remove(struct platform_device *pdev) +{ + struct mlxreg_fan *fan = platform_get_drvdata(pdev); + + if (IS_REACHABLE(CONFIG_THERMAL)) + thermal_cooling_device_unregister(fan->cdev); + + return 0; +} + +static struct platform_driver mlxreg_fan_driver = { + .driver = { + .name = "mlxreg-fan", + }, + .probe = mlxreg_fan_probe, + .remove = mlxreg_fan_remove, +}; + +module_platform_driver(mlxreg_fan_driver); + +MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>"); +MODULE_DESCRIPTION("Mellanox FAN driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:mlxreg-fan"); diff --git a/drivers/hwmon/nct6775.c b/drivers/hwmon/nct6775.c index f9d1349c3286..c6bd61e4695a 100644 --- a/drivers/hwmon/nct6775.c +++ b/drivers/hwmon/nct6775.c @@ -1050,8 +1050,8 @@ struct nct6775_data { u64 beeps; u8 pwm_num; /* number of pwm */ - u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage, - * 0->PWM variable duty cycle + u8 pwm_mode[NUM_FAN]; /* 0->DC variable voltage, + * 1->PWM variable duty cycle */ enum pwm_enable pwm_enable[NUM_FAN]; /* 0->off @@ -2541,7 +2541,7 @@ static void pwm_update_registers(struct nct6775_data *data, int nr) case thermal_cruise: nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]); - /* intentional */ + /* fall through */ default: reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]); reg = (reg & ~data->tolerance_mask) | diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c index 95a68ab175c7..7815ddf149f6 100644 --- a/drivers/hwmon/nct7904.c +++ b/drivers/hwmon/nct7904.c @@ -77,7 +77,7 @@ struct nct7904_data { }; /* Access functions */ -static int nct7904_bank_lock(struct nct7904_data *data, unsigned bank) +static int nct7904_bank_lock(struct nct7904_data *data, unsigned int bank) { int ret; @@ -99,7 +99,7 @@ static inline void nct7904_bank_release(struct nct7904_data *data) /* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */ static int nct7904_read_reg(struct nct7904_data *data, - unsigned bank, unsigned reg) + unsigned int bank, unsigned int reg) { struct i2c_client *client = data->client; int ret; @@ -117,7 +117,7 @@ static int nct7904_read_reg(struct nct7904_data *data, * -ERRNO on error. */ static int nct7904_read_reg16(struct nct7904_data *data, - unsigned bank, unsigned reg) + unsigned int bank, unsigned int reg) { struct i2c_client *client = data->client; int ret, hi; @@ -139,7 +139,7 @@ static int nct7904_read_reg16(struct nct7904_data *data, /* Write 1-byte register. Returns 0 or -ERRNO on error. */ static int nct7904_write_reg(struct nct7904_data *data, - unsigned bank, unsigned reg, u8 val) + unsigned int bank, unsigned int reg, u8 val) { struct i2c_client *client = data->client; int ret; @@ -159,7 +159,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel, unsigned int cnt, rpm; int ret; - switch(attr) { + switch (attr) { case hwmon_fan_input: ret = nct7904_read_reg16(data, BANK_0, FANIN1_HV_REG + channel * 2); @@ -200,7 +200,7 @@ static int nct7904_read_in(struct device *dev, u32 attr, int channel, index = nct7904_chan_to_index[channel]; - switch(attr) { + switch (attr) { case hwmon_in_input: ret = nct7904_read_reg16(data, BANK_0, VSEN1_HV_REG + index * 2); @@ -236,7 +236,7 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel, struct nct7904_data *data = dev_get_drvdata(dev); int ret, temp; - switch(attr) { + switch (attr) { case hwmon_temp_input: if (channel == 0) ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG); @@ -276,7 +276,7 @@ static int nct7904_read_pwm(struct device *dev, u32 attr, int channel, struct nct7904_data *data = dev_get_drvdata(dev); int ret; - switch(attr) { + switch (attr) { case hwmon_pwm_input: ret = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + channel); if (ret < 0) @@ -301,7 +301,7 @@ static int nct7904_write_pwm(struct device *dev, u32 attr, int channel, struct nct7904_data *data = dev_get_drvdata(dev); int ret; - switch(attr) { + switch (attr) { case hwmon_pwm_input: if (val < 0 || val > 255) return -EINVAL; @@ -322,7 +322,7 @@ static int nct7904_write_pwm(struct device *dev, u32 attr, int channel, static umode_t nct7904_pwm_is_visible(const void *_data, u32 attr, int channel) { - switch(attr) { + switch (attr) { case hwmon_pwm_input: case hwmon_pwm_enable: return S_IRUGO | S_IWUSR; @@ -431,15 +431,15 @@ static const struct hwmon_channel_info nct7904_in = { }; static const u32 nct7904_fan_config[] = { - HWMON_F_INPUT, - HWMON_F_INPUT, - HWMON_F_INPUT, - HWMON_F_INPUT, - HWMON_F_INPUT, - HWMON_F_INPUT, - HWMON_F_INPUT, - HWMON_F_INPUT, - 0 + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + 0 }; static const struct hwmon_channel_info nct7904_fan = { @@ -448,11 +448,11 @@ static const struct hwmon_channel_info nct7904_fan = { }; static const u32 nct7904_pwm_config[] = { - HWMON_PWM_INPUT | HWMON_PWM_ENABLE, - HWMON_PWM_INPUT | HWMON_PWM_ENABLE, - HWMON_PWM_INPUT | HWMON_PWM_ENABLE, - HWMON_PWM_INPUT | HWMON_PWM_ENABLE, - 0 + HWMON_PWM_INPUT | HWMON_PWM_ENABLE, + HWMON_PWM_INPUT | HWMON_PWM_ENABLE, + HWMON_PWM_INPUT | HWMON_PWM_ENABLE, + HWMON_PWM_INPUT | HWMON_PWM_ENABLE, + 0 }; static const struct hwmon_channel_info nct7904_pwm = { @@ -461,16 +461,16 @@ static const struct hwmon_channel_info nct7904_pwm = { }; static const u32 nct7904_temp_config[] = { - HWMON_T_INPUT, - HWMON_T_INPUT, - HWMON_T_INPUT, - HWMON_T_INPUT, - HWMON_T_INPUT, - HWMON_T_INPUT, - HWMON_T_INPUT, - HWMON_T_INPUT, - HWMON_T_INPUT, - 0 + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + 0 }; static const struct hwmon_channel_info nct7904_temp = { diff --git a/drivers/hwmon/npcm750-pwm-fan.c b/drivers/hwmon/npcm750-pwm-fan.c new file mode 100644 index 000000000000..8474d601aa63 --- /dev/null +++ b/drivers/hwmon/npcm750-pwm-fan.c @@ -0,0 +1,1057 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2014-2018 Nuvoton Technology corporation. + +#include <linux/clk.h> +#include <linux/device.h> +#include <linux/hwmon.h> +#include <linux/hwmon-sysfs.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/platform_device.h> +#include <linux/spinlock.h> +#include <linux/sysfs.h> +#include <linux/thermal.h> + +/* NPCM7XX PWM registers */ +#define NPCM7XX_PWM_REG_BASE(base, n) ((base) + ((n) * 0x1000L)) + +#define NPCM7XX_PWM_REG_PR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x00) +#define NPCM7XX_PWM_REG_CSR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x04) +#define NPCM7XX_PWM_REG_CR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x08) +#define NPCM7XX_PWM_REG_CNRx(base, n, ch) \ + (NPCM7XX_PWM_REG_BASE(base, n) + 0x0C + (12 * (ch))) +#define NPCM7XX_PWM_REG_CMRx(base, n, ch) \ + (NPCM7XX_PWM_REG_BASE(base, n) + 0x10 + (12 * (ch))) +#define NPCM7XX_PWM_REG_PDRx(base, n, ch) \ + (NPCM7XX_PWM_REG_BASE(base, n) + 0x14 + (12 * (ch))) +#define NPCM7XX_PWM_REG_PIER(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x3C) +#define NPCM7XX_PWM_REG_PIIR(base, n) (NPCM7XX_PWM_REG_BASE(base, n) + 0x40) + +#define NPCM7XX_PWM_CTRL_CH0_MODE_BIT BIT(3) +#define NPCM7XX_PWM_CTRL_CH1_MODE_BIT BIT(11) +#define NPCM7XX_PWM_CTRL_CH2_MODE_BIT BIT(15) +#define NPCM7XX_PWM_CTRL_CH3_MODE_BIT BIT(19) + +#define NPCM7XX_PWM_CTRL_CH0_INV_BIT BIT(2) +#define NPCM7XX_PWM_CTRL_CH1_INV_BIT BIT(10) +#define NPCM7XX_PWM_CTRL_CH2_INV_BIT BIT(14) +#define NPCM7XX_PWM_CTRL_CH3_INV_BIT BIT(18) + +#define NPCM7XX_PWM_CTRL_CH0_EN_BIT BIT(0) +#define NPCM7XX_PWM_CTRL_CH1_EN_BIT BIT(8) +#define NPCM7XX_PWM_CTRL_CH2_EN_BIT BIT(12) +#define NPCM7XX_PWM_CTRL_CH3_EN_BIT BIT(16) + +/* Define the maximum PWM channel number */ +#define NPCM7XX_PWM_MAX_CHN_NUM 8 +#define NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE 4 +#define NPCM7XX_PWM_MAX_MODULES 2 + +/* Define the Counter Register, value = 100 for match 100% */ +#define NPCM7XX_PWM_COUNTER_DEFAULT_NUM 255 +#define NPCM7XX_PWM_CMR_DEFAULT_NUM 127 +#define NPCM7XX_PWM_CMR_MAX 255 + +/* default all PWM channels PRESCALE2 = 1 */ +#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH0 0x4 +#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH1 0x40 +#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH2 0x400 +#define NPCM7XX_PWM_PRESCALE2_DEFAULT_CH3 0x4000 + +#define PWM_OUTPUT_FREQ_25KHZ 25000 +#define PWN_CNT_DEFAULT 256 +#define MIN_PRESCALE1 2 +#define NPCM7XX_PWM_PRESCALE_SHIFT_CH01 8 + +#define NPCM7XX_PWM_PRESCALE2_DEFAULT (NPCM7XX_PWM_PRESCALE2_DEFAULT_CH0 | \ + NPCM7XX_PWM_PRESCALE2_DEFAULT_CH1 | \ + NPCM7XX_PWM_PRESCALE2_DEFAULT_CH2 | \ + NPCM7XX_PWM_PRESCALE2_DEFAULT_CH3) + +#define NPCM7XX_PWM_CTRL_MODE_DEFAULT (NPCM7XX_PWM_CTRL_CH0_MODE_BIT | \ + NPCM7XX_PWM_CTRL_CH1_MODE_BIT | \ + NPCM7XX_PWM_CTRL_CH2_MODE_BIT | \ + NPCM7XX_PWM_CTRL_CH3_MODE_BIT) + +/* NPCM7XX FAN Tacho registers */ +#define NPCM7XX_FAN_REG_BASE(base, n) ((base) + ((n) * 0x1000L)) + +#define NPCM7XX_FAN_REG_TCNT1(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x00) +#define NPCM7XX_FAN_REG_TCRA(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x02) +#define NPCM7XX_FAN_REG_TCRB(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x04) +#define NPCM7XX_FAN_REG_TCNT2(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x06) +#define NPCM7XX_FAN_REG_TPRSC(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x08) +#define NPCM7XX_FAN_REG_TCKC(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x0A) +#define NPCM7XX_FAN_REG_TMCTRL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x0C) +#define NPCM7XX_FAN_REG_TICTRL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x0E) +#define NPCM7XX_FAN_REG_TICLR(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x10) +#define NPCM7XX_FAN_REG_TIEN(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x12) +#define NPCM7XX_FAN_REG_TCPA(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x14) +#define NPCM7XX_FAN_REG_TCPB(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x16) +#define NPCM7XX_FAN_REG_TCPCFG(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x18) +#define NPCM7XX_FAN_REG_TINASEL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x1A) +#define NPCM7XX_FAN_REG_TINBSEL(base, n) (NPCM7XX_FAN_REG_BASE(base, n) + 0x1C) + +#define NPCM7XX_FAN_TCKC_CLKX_NONE 0 +#define NPCM7XX_FAN_TCKC_CLK1_APB BIT(0) +#define NPCM7XX_FAN_TCKC_CLK2_APB BIT(3) + +#define NPCM7XX_FAN_TMCTRL_TBEN BIT(6) +#define NPCM7XX_FAN_TMCTRL_TAEN BIT(5) +#define NPCM7XX_FAN_TMCTRL_TBEDG BIT(4) +#define NPCM7XX_FAN_TMCTRL_TAEDG BIT(3) +#define NPCM7XX_FAN_TMCTRL_MODE_5 BIT(2) + +#define NPCM7XX_FAN_TICLR_CLEAR_ALL GENMASK(5, 0) +#define NPCM7XX_FAN_TICLR_TFCLR BIT(5) +#define NPCM7XX_FAN_TICLR_TECLR BIT(4) +#define NPCM7XX_FAN_TICLR_TDCLR BIT(3) +#define NPCM7XX_FAN_TICLR_TCCLR BIT(2) +#define NPCM7XX_FAN_TICLR_TBCLR BIT(1) +#define NPCM7XX_FAN_TICLR_TACLR BIT(0) + +#define NPCM7XX_FAN_TIEN_ENABLE_ALL GENMASK(5, 0) +#define NPCM7XX_FAN_TIEN_TFIEN BIT(5) +#define NPCM7XX_FAN_TIEN_TEIEN BIT(4) +#define NPCM7XX_FAN_TIEN_TDIEN BIT(3) +#define NPCM7XX_FAN_TIEN_TCIEN BIT(2) +#define NPCM7XX_FAN_TIEN_TBIEN BIT(1) +#define NPCM7XX_FAN_TIEN_TAIEN BIT(0) + +#define NPCM7XX_FAN_TICTRL_TFPND BIT(5) +#define NPCM7XX_FAN_TICTRL_TEPND BIT(4) +#define NPCM7XX_FAN_TICTRL_TDPND BIT(3) +#define NPCM7XX_FAN_TICTRL_TCPND BIT(2) +#define NPCM7XX_FAN_TICTRL_TBPND BIT(1) +#define NPCM7XX_FAN_TICTRL_TAPND BIT(0) + +#define NPCM7XX_FAN_TCPCFG_HIBEN BIT(7) +#define NPCM7XX_FAN_TCPCFG_EQBEN BIT(6) +#define NPCM7XX_FAN_TCPCFG_LOBEN BIT(5) +#define NPCM7XX_FAN_TCPCFG_CPBSEL BIT(4) +#define NPCM7XX_FAN_TCPCFG_HIAEN BIT(3) +#define NPCM7XX_FAN_TCPCFG_EQAEN BIT(2) +#define NPCM7XX_FAN_TCPCFG_LOAEN BIT(1) +#define NPCM7XX_FAN_TCPCFG_CPASEL BIT(0) + +/* FAN General Definition */ +/* Define the maximum FAN channel number */ +#define NPCM7XX_FAN_MAX_MODULE 8 +#define NPCM7XX_FAN_MAX_CHN_NUM_IN_A_MODULE 2 +#define NPCM7XX_FAN_MAX_CHN_NUM 16 + +/* + * Get Fan Tach Timeout (base on clock 214843.75Hz, 1 cnt = 4.654us) + * Timeout 94ms ~= 0x5000 + * (The minimum FAN speed could to support ~640RPM/pulse 1, + * 320RPM/pulse 2, ...-- 10.6Hz) + */ +#define NPCM7XX_FAN_TIMEOUT 0x5000 +#define NPCM7XX_FAN_TCNT 0xFFFF +#define NPCM7XX_FAN_TCPA (NPCM7XX_FAN_TCNT - NPCM7XX_FAN_TIMEOUT) +#define NPCM7XX_FAN_TCPB (NPCM7XX_FAN_TCNT - NPCM7XX_FAN_TIMEOUT) + +#define NPCM7XX_FAN_POLL_TIMER_200MS 200 +#define NPCM7XX_FAN_DEFAULT_PULSE_PER_REVOLUTION 2 +#define NPCM7XX_FAN_TINASEL_FANIN_DEFAULT 0 +#define NPCM7XX_FAN_CLK_PRESCALE 255 + +#define NPCM7XX_FAN_CMPA 0 +#define NPCM7XX_FAN_CMPB 1 + +/* Obtain the fan number */ +#define NPCM7XX_FAN_INPUT(fan, cmp) (((fan) << 1) + (cmp)) + +/* fan sample status */ +#define FAN_DISABLE 0xFF +#define FAN_INIT 0x00 +#define FAN_PREPARE_TO_GET_FIRST_CAPTURE 0x01 +#define FAN_ENOUGH_SAMPLE 0x02 + +struct npcm7xx_fan_dev { + u8 fan_st_flg; + u8 fan_pls_per_rev; + u16 fan_cnt; + u32 fan_cnt_tmp; +}; + +struct npcm7xx_cooling_device { + char name[THERMAL_NAME_LENGTH]; + struct npcm7xx_pwm_fan_data *data; + struct thermal_cooling_device *tcdev; + int pwm_port; + u8 *cooling_levels; + u8 max_state; + u8 cur_state; +}; + +struct npcm7xx_pwm_fan_data { + void __iomem *pwm_base; + void __iomem *fan_base; + unsigned long pwm_clk_freq; + unsigned long fan_clk_freq; + struct clk *pwm_clk; + struct clk *fan_clk; + struct mutex pwm_lock[NPCM7XX_PWM_MAX_MODULES]; + spinlock_t fan_lock[NPCM7XX_FAN_MAX_MODULE]; + int fan_irq[NPCM7XX_FAN_MAX_MODULE]; + bool pwm_present[NPCM7XX_PWM_MAX_CHN_NUM]; + bool fan_present[NPCM7XX_FAN_MAX_CHN_NUM]; + u32 input_clk_freq; + struct timer_list fan_timer; + struct npcm7xx_fan_dev fan_dev[NPCM7XX_FAN_MAX_CHN_NUM]; + struct npcm7xx_cooling_device *cdev[NPCM7XX_PWM_MAX_CHN_NUM]; + u8 fan_select; +}; + +static int npcm7xx_pwm_config_set(struct npcm7xx_pwm_fan_data *data, + int channel, u16 val) +{ + u32 pwm_ch = (channel % NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE); + u32 module = (channel / NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE); + u32 tmp_buf, ctrl_en_bit, env_bit; + + /* + * Config PWM Comparator register for setting duty cycle + */ + mutex_lock(&data->pwm_lock[module]); + + /* write new CMR value */ + iowrite32(val, NPCM7XX_PWM_REG_CMRx(data->pwm_base, module, pwm_ch)); + tmp_buf = ioread32(NPCM7XX_PWM_REG_CR(data->pwm_base, module)); + + switch (pwm_ch) { + case 0: + ctrl_en_bit = NPCM7XX_PWM_CTRL_CH0_EN_BIT; + env_bit = NPCM7XX_PWM_CTRL_CH0_INV_BIT; + break; + case 1: + ctrl_en_bit = NPCM7XX_PWM_CTRL_CH1_EN_BIT; + env_bit = NPCM7XX_PWM_CTRL_CH1_INV_BIT; + break; + case 2: + ctrl_en_bit = NPCM7XX_PWM_CTRL_CH2_EN_BIT; + env_bit = NPCM7XX_PWM_CTRL_CH2_INV_BIT; + break; + case 3: + ctrl_en_bit = NPCM7XX_PWM_CTRL_CH3_EN_BIT; + env_bit = NPCM7XX_PWM_CTRL_CH3_INV_BIT; + break; + default: + mutex_unlock(&data->pwm_lock[module]); + return -ENODEV; + } + + if (val == 0) { + /* Disable PWM */ + tmp_buf &= ~ctrl_en_bit; + tmp_buf |= env_bit; + } else { + /* Enable PWM */ + tmp_buf |= ctrl_en_bit; + tmp_buf &= ~env_bit; + } + + iowrite32(tmp_buf, NPCM7XX_PWM_REG_CR(data->pwm_base, module)); + mutex_unlock(&data->pwm_lock[module]); + + return 0; +} + +static inline void npcm7xx_fan_start_capture(struct npcm7xx_pwm_fan_data *data, + u8 fan, u8 cmp) +{ + u8 fan_id; + u8 reg_mode; + u8 reg_int; + unsigned long flags; + + fan_id = NPCM7XX_FAN_INPUT(fan, cmp); + + /* to check whether any fan tach is enable */ + if (data->fan_dev[fan_id].fan_st_flg != FAN_DISABLE) { + /* reset status */ + spin_lock_irqsave(&data->fan_lock[fan], flags); + + data->fan_dev[fan_id].fan_st_flg = FAN_INIT; + reg_int = ioread8(NPCM7XX_FAN_REG_TIEN(data->fan_base, fan)); + + /* + * the interrupt enable bits do not need to be cleared before + * it sets, the interrupt enable bits are cleared only on reset. + * the clock unit control register is behaving in the same + * manner that the interrupt enable register behave. + */ + if (cmp == NPCM7XX_FAN_CMPA) { + /* enable interrupt */ + iowrite8(reg_int | (NPCM7XX_FAN_TIEN_TAIEN | + NPCM7XX_FAN_TIEN_TEIEN), + NPCM7XX_FAN_REG_TIEN(data->fan_base, fan)); + + reg_mode = NPCM7XX_FAN_TCKC_CLK1_APB + | ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base, + fan)); + + /* start to Capture */ + iowrite8(reg_mode, NPCM7XX_FAN_REG_TCKC(data->fan_base, + fan)); + } else { + /* enable interrupt */ + iowrite8(reg_int | (NPCM7XX_FAN_TIEN_TBIEN | + NPCM7XX_FAN_TIEN_TFIEN), + NPCM7XX_FAN_REG_TIEN(data->fan_base, fan)); + + reg_mode = + NPCM7XX_FAN_TCKC_CLK2_APB + | ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base, + fan)); + + /* start to Capture */ + iowrite8(reg_mode, + NPCM7XX_FAN_REG_TCKC(data->fan_base, fan)); + } + + spin_unlock_irqrestore(&data->fan_lock[fan], flags); + } +} + +/* + * Enable a background timer to poll fan tach value, (200ms * 4) + * to polling all fan + */ +static void npcm7xx_fan_polling(struct timer_list *t) +{ + struct npcm7xx_pwm_fan_data *data; + int i; + + data = from_timer(data, t, fan_timer); + + /* + * Polling two module per one round, + * FAN01 & FAN89 / FAN23 & FAN1011 / FAN45 & FAN1213 / FAN67 & FAN1415 + */ + for (i = data->fan_select; i < NPCM7XX_FAN_MAX_MODULE; + i = i + 4) { + /* clear the flag and reset the counter (TCNT) */ + iowrite8(NPCM7XX_FAN_TICLR_CLEAR_ALL, + NPCM7XX_FAN_REG_TICLR(data->fan_base, i)); + + if (data->fan_present[i * 2]) { + iowrite16(NPCM7XX_FAN_TCNT, + NPCM7XX_FAN_REG_TCNT1(data->fan_base, i)); + npcm7xx_fan_start_capture(data, i, NPCM7XX_FAN_CMPA); + } + if (data->fan_present[(i * 2) + 1]) { + iowrite16(NPCM7XX_FAN_TCNT, + NPCM7XX_FAN_REG_TCNT2(data->fan_base, i)); + npcm7xx_fan_start_capture(data, i, NPCM7XX_FAN_CMPB); + } + } + + data->fan_select++; + data->fan_select &= 0x3; + + /* reset the timer interval */ + data->fan_timer.expires = jiffies + + msecs_to_jiffies(NPCM7XX_FAN_POLL_TIMER_200MS); + add_timer(&data->fan_timer); +} + +static inline void npcm7xx_fan_compute(struct npcm7xx_pwm_fan_data *data, + u8 fan, u8 cmp, u8 fan_id, u8 flag_int, + u8 flag_mode, u8 flag_clear) +{ + u8 reg_int; + u8 reg_mode; + u16 fan_cap; + + if (cmp == NPCM7XX_FAN_CMPA) + fan_cap = ioread16(NPCM7XX_FAN_REG_TCRA(data->fan_base, fan)); + else + fan_cap = ioread16(NPCM7XX_FAN_REG_TCRB(data->fan_base, fan)); + + /* clear capature flag, H/W will auto reset the NPCM7XX_FAN_TCNTx */ + iowrite8(flag_clear, NPCM7XX_FAN_REG_TICLR(data->fan_base, fan)); + + if (data->fan_dev[fan_id].fan_st_flg == FAN_INIT) { + /* First capture, drop it */ + data->fan_dev[fan_id].fan_st_flg = + FAN_PREPARE_TO_GET_FIRST_CAPTURE; + + /* reset counter */ + data->fan_dev[fan_id].fan_cnt_tmp = 0; + } else if (data->fan_dev[fan_id].fan_st_flg < FAN_ENOUGH_SAMPLE) { + /* + * collect the enough sample, + * (ex: 2 pulse fan need to get 2 sample) + */ + data->fan_dev[fan_id].fan_cnt_tmp += + (NPCM7XX_FAN_TCNT - fan_cap); + + data->fan_dev[fan_id].fan_st_flg++; + } else { + /* get enough sample or fan disable */ + if (data->fan_dev[fan_id].fan_st_flg == FAN_ENOUGH_SAMPLE) { + data->fan_dev[fan_id].fan_cnt_tmp += + (NPCM7XX_FAN_TCNT - fan_cap); + + /* compute finial average cnt per pulse */ + data->fan_dev[fan_id].fan_cnt = + data->fan_dev[fan_id].fan_cnt_tmp / + FAN_ENOUGH_SAMPLE; + + data->fan_dev[fan_id].fan_st_flg = FAN_INIT; + } + + reg_int = ioread8(NPCM7XX_FAN_REG_TIEN(data->fan_base, fan)); + + /* disable interrupt */ + iowrite8((reg_int & ~flag_int), + NPCM7XX_FAN_REG_TIEN(data->fan_base, fan)); + reg_mode = ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base, fan)); + + /* stop capturing */ + iowrite8((reg_mode & ~flag_mode), + NPCM7XX_FAN_REG_TCKC(data->fan_base, fan)); + } +} + +static inline void npcm7xx_check_cmp(struct npcm7xx_pwm_fan_data *data, + u8 fan, u8 cmp, u8 flag) +{ + u8 reg_int; + u8 reg_mode; + u8 flag_timeout; + u8 flag_cap; + u8 flag_clear; + u8 flag_int; + u8 flag_mode; + u8 fan_id; + + fan_id = NPCM7XX_FAN_INPUT(fan, cmp); + + if (cmp == NPCM7XX_FAN_CMPA) { + flag_cap = NPCM7XX_FAN_TICTRL_TAPND; + flag_timeout = NPCM7XX_FAN_TICTRL_TEPND; + flag_int = NPCM7XX_FAN_TIEN_TAIEN | NPCM7XX_FAN_TIEN_TEIEN; + flag_mode = NPCM7XX_FAN_TCKC_CLK1_APB; + flag_clear = NPCM7XX_FAN_TICLR_TACLR | NPCM7XX_FAN_TICLR_TECLR; + } else { + flag_cap = NPCM7XX_FAN_TICTRL_TBPND; + flag_timeout = NPCM7XX_FAN_TICTRL_TFPND; + flag_int = NPCM7XX_FAN_TIEN_TBIEN | NPCM7XX_FAN_TIEN_TFIEN; + flag_mode = NPCM7XX_FAN_TCKC_CLK2_APB; + flag_clear = NPCM7XX_FAN_TICLR_TBCLR | NPCM7XX_FAN_TICLR_TFCLR; + } + + if (flag & flag_timeout) { + reg_int = ioread8(NPCM7XX_FAN_REG_TIEN(data->fan_base, fan)); + + /* disable interrupt */ + iowrite8((reg_int & ~flag_int), + NPCM7XX_FAN_REG_TIEN(data->fan_base, fan)); + + /* clear interrupt flag */ + iowrite8(flag_clear, + NPCM7XX_FAN_REG_TICLR(data->fan_base, fan)); + + reg_mode = ioread8(NPCM7XX_FAN_REG_TCKC(data->fan_base, fan)); + + /* stop capturing */ + iowrite8((reg_mode & ~flag_mode), + NPCM7XX_FAN_REG_TCKC(data->fan_base, fan)); + + /* + * If timeout occurs (NPCM7XX_FAN_TIMEOUT), the fan doesn't + * connect or speed is lower than 10.6Hz (320RPM/pulse2). + * In these situation, the RPM output should be zero. + */ + data->fan_dev[fan_id].fan_cnt = 0; + } else { + /* input capture is occurred */ + if (flag & flag_cap) + npcm7xx_fan_compute(data, fan, cmp, fan_id, flag_int, + flag_mode, flag_clear); + } +} + +static irqreturn_t npcm7xx_fan_isr(int irq, void *dev_id) +{ + struct npcm7xx_pwm_fan_data *data = dev_id; + unsigned long flags; + int module; + u8 flag; + + module = irq - data->fan_irq[0]; + spin_lock_irqsave(&data->fan_lock[module], flags); + + flag = ioread8(NPCM7XX_FAN_REG_TICTRL(data->fan_base, module)); + if (flag > 0) { + npcm7xx_check_cmp(data, module, NPCM7XX_FAN_CMPA, flag); + npcm7xx_check_cmp(data, module, NPCM7XX_FAN_CMPB, flag); + spin_unlock_irqrestore(&data->fan_lock[module], flags); + return IRQ_HANDLED; + } + + spin_unlock_irqrestore(&data->fan_lock[module], flags); + + return IRQ_NONE; +} + +static int npcm7xx_read_pwm(struct device *dev, u32 attr, int channel, + long *val) +{ + struct npcm7xx_pwm_fan_data *data = dev_get_drvdata(dev); + u32 pmw_ch = (channel % NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE); + u32 module = (channel / NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE); + + switch (attr) { + case hwmon_pwm_input: + *val = ioread32 + (NPCM7XX_PWM_REG_CMRx(data->pwm_base, module, pmw_ch)); + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int npcm7xx_write_pwm(struct device *dev, u32 attr, int channel, + long val) +{ + struct npcm7xx_pwm_fan_data *data = dev_get_drvdata(dev); + int err; + + switch (attr) { + case hwmon_pwm_input: + if (val < 0 || val > NPCM7XX_PWM_CMR_MAX) + return -EINVAL; + err = npcm7xx_pwm_config_set(data, channel, (u16)val); + break; + default: + err = -EOPNOTSUPP; + break; + } + + return err; +} + +static umode_t npcm7xx_pwm_is_visible(const void *_data, u32 attr, int channel) +{ + const struct npcm7xx_pwm_fan_data *data = _data; + + if (!data->pwm_present[channel]) + return 0; + + switch (attr) { + case hwmon_pwm_input: + return 0644; + default: + return 0; + } +} + +static int npcm7xx_read_fan(struct device *dev, u32 attr, int channel, + long *val) +{ + struct npcm7xx_pwm_fan_data *data = dev_get_drvdata(dev); + + switch (attr) { + case hwmon_fan_input: + *val = 0; + if (data->fan_dev[channel].fan_cnt <= 0) + return data->fan_dev[channel].fan_cnt; + + /* Convert the raw reading to RPM */ + if (data->fan_dev[channel].fan_cnt > 0 && + data->fan_dev[channel].fan_pls_per_rev > 0) + *val = ((data->input_clk_freq * 60) / + (data->fan_dev[channel].fan_cnt * + data->fan_dev[channel].fan_pls_per_rev)); + return 0; + default: + return -EOPNOTSUPP; + } +} + +static umode_t npcm7xx_fan_is_visible(const void *_data, u32 attr, int channel) +{ + const struct npcm7xx_pwm_fan_data *data = _data; + + if (!data->fan_present[channel]) + return 0; + + switch (attr) { + case hwmon_fan_input: + return 0444; + default: + return 0; + } +} + +static int npcm7xx_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + switch (type) { + case hwmon_pwm: + return npcm7xx_read_pwm(dev, attr, channel, val); + case hwmon_fan: + return npcm7xx_read_fan(dev, attr, channel, val); + default: + return -EOPNOTSUPP; + } +} + +static int npcm7xx_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + switch (type) { + case hwmon_pwm: + return npcm7xx_write_pwm(dev, attr, channel, val); + default: + return -EOPNOTSUPP; + } +} + +static umode_t npcm7xx_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + switch (type) { + case hwmon_pwm: + return npcm7xx_pwm_is_visible(data, attr, channel); + case hwmon_fan: + return npcm7xx_fan_is_visible(data, attr, channel); + default: + return 0; + } +} + +static const u32 npcm7xx_pwm_config[] = { + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + 0 +}; + +static const struct hwmon_channel_info npcm7xx_pwm = { + .type = hwmon_pwm, + .config = npcm7xx_pwm_config, +}; + +static const u32 npcm7xx_fan_config[] = { + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + HWMON_F_INPUT, + 0 +}; + +static const struct hwmon_channel_info npcm7xx_fan = { + .type = hwmon_fan, + .config = npcm7xx_fan_config, +}; + +static const struct hwmon_channel_info *npcm7xx_info[] = { + &npcm7xx_pwm, + &npcm7xx_fan, + NULL +}; + +static const struct hwmon_ops npcm7xx_hwmon_ops = { + .is_visible = npcm7xx_is_visible, + .read = npcm7xx_read, + .write = npcm7xx_write, +}; + +static const struct hwmon_chip_info npcm7xx_chip_info = { + .ops = &npcm7xx_hwmon_ops, + .info = npcm7xx_info, +}; + +static u32 npcm7xx_pwm_init(struct npcm7xx_pwm_fan_data *data) +{ + int m, ch; + u32 prescale_val, output_freq; + + data->pwm_clk_freq = clk_get_rate(data->pwm_clk); + + /* Adjust NPCM7xx PWMs output frequency to ~25Khz */ + output_freq = data->pwm_clk_freq / PWN_CNT_DEFAULT; + prescale_val = DIV_ROUND_CLOSEST(output_freq, PWM_OUTPUT_FREQ_25KHZ); + + /* If prescale_val = 0, then the prescale output clock is stopped */ + if (prescale_val < MIN_PRESCALE1) + prescale_val = MIN_PRESCALE1; + /* + * prescale_val need to decrement in one because in the PWM Prescale + * register the Prescale value increment by one + */ + prescale_val--; + + /* Setting PWM Prescale Register value register to both modules */ + prescale_val |= (prescale_val << NPCM7XX_PWM_PRESCALE_SHIFT_CH01); + + for (m = 0; m < NPCM7XX_PWM_MAX_MODULES ; m++) { + iowrite32(prescale_val, NPCM7XX_PWM_REG_PR(data->pwm_base, m)); + iowrite32(NPCM7XX_PWM_PRESCALE2_DEFAULT, + NPCM7XX_PWM_REG_CSR(data->pwm_base, m)); + iowrite32(NPCM7XX_PWM_CTRL_MODE_DEFAULT, + NPCM7XX_PWM_REG_CR(data->pwm_base, m)); + + for (ch = 0; ch < NPCM7XX_PWM_MAX_CHN_NUM_IN_A_MODULE; ch++) { + iowrite32(NPCM7XX_PWM_COUNTER_DEFAULT_NUM, + NPCM7XX_PWM_REG_CNRx(data->pwm_base, m, ch)); + } + } + + return output_freq / ((prescale_val & 0xf) + 1); +} + +static void npcm7xx_fan_init(struct npcm7xx_pwm_fan_data *data) +{ + int md; + int ch; + int i; + u32 apb_clk_freq; + + for (md = 0; md < NPCM7XX_FAN_MAX_MODULE; md++) { + /* stop FAN0~7 clock */ + iowrite8(NPCM7XX_FAN_TCKC_CLKX_NONE, + NPCM7XX_FAN_REG_TCKC(data->fan_base, md)); + + /* disable all interrupt */ + iowrite8(0x00, NPCM7XX_FAN_REG_TIEN(data->fan_base, md)); + + /* clear all interrupt */ + iowrite8(NPCM7XX_FAN_TICLR_CLEAR_ALL, + NPCM7XX_FAN_REG_TICLR(data->fan_base, md)); + + /* set FAN0~7 clock prescaler */ + iowrite8(NPCM7XX_FAN_CLK_PRESCALE, + NPCM7XX_FAN_REG_TPRSC(data->fan_base, md)); + + /* set FAN0~7 mode (high-to-low transition) */ + iowrite8((NPCM7XX_FAN_TMCTRL_MODE_5 | NPCM7XX_FAN_TMCTRL_TBEN | + NPCM7XX_FAN_TMCTRL_TAEN), + NPCM7XX_FAN_REG_TMCTRL(data->fan_base, md)); + + /* set FAN0~7 Initial Count/Cap */ + iowrite16(NPCM7XX_FAN_TCNT, + NPCM7XX_FAN_REG_TCNT1(data->fan_base, md)); + iowrite16(NPCM7XX_FAN_TCNT, + NPCM7XX_FAN_REG_TCNT2(data->fan_base, md)); + + /* set FAN0~7 compare (equal to count) */ + iowrite8((NPCM7XX_FAN_TCPCFG_EQAEN | NPCM7XX_FAN_TCPCFG_EQBEN), + NPCM7XX_FAN_REG_TCPCFG(data->fan_base, md)); + + /* set FAN0~7 compare value */ + iowrite16(NPCM7XX_FAN_TCPA, + NPCM7XX_FAN_REG_TCPA(data->fan_base, md)); + iowrite16(NPCM7XX_FAN_TCPB, + NPCM7XX_FAN_REG_TCPB(data->fan_base, md)); + + /* set FAN0~7 fan input FANIN 0~15 */ + iowrite8(NPCM7XX_FAN_TINASEL_FANIN_DEFAULT, + NPCM7XX_FAN_REG_TINASEL(data->fan_base, md)); + iowrite8(NPCM7XX_FAN_TINASEL_FANIN_DEFAULT, + NPCM7XX_FAN_REG_TINBSEL(data->fan_base, md)); + + for (i = 0; i < NPCM7XX_FAN_MAX_CHN_NUM_IN_A_MODULE; i++) { + ch = md * NPCM7XX_FAN_MAX_CHN_NUM_IN_A_MODULE + i; + data->fan_dev[ch].fan_st_flg = FAN_DISABLE; + data->fan_dev[ch].fan_pls_per_rev = + NPCM7XX_FAN_DEFAULT_PULSE_PER_REVOLUTION; + data->fan_dev[ch].fan_cnt = 0; + } + } + + apb_clk_freq = clk_get_rate(data->fan_clk); + + /* Fan tach input clock = APB clock / prescalar, default is 255. */ + data->input_clk_freq = apb_clk_freq / (NPCM7XX_FAN_CLK_PRESCALE + 1); +} + +static int +npcm7xx_pwm_cz_get_max_state(struct thermal_cooling_device *tcdev, + unsigned long *state) +{ + struct npcm7xx_cooling_device *cdev = tcdev->devdata; + + *state = cdev->max_state; + + return 0; +} + +static int +npcm7xx_pwm_cz_get_cur_state(struct thermal_cooling_device *tcdev, + unsigned long *state) +{ + struct npcm7xx_cooling_device *cdev = tcdev->devdata; + + *state = cdev->cur_state; + + return 0; +} + +static int +npcm7xx_pwm_cz_set_cur_state(struct thermal_cooling_device *tcdev, + unsigned long state) +{ + struct npcm7xx_cooling_device *cdev = tcdev->devdata; + int ret; + + if (state > cdev->max_state) + return -EINVAL; + + cdev->cur_state = state; + ret = npcm7xx_pwm_config_set(cdev->data, cdev->pwm_port, + cdev->cooling_levels[cdev->cur_state]); + + return ret; +} + +static const struct thermal_cooling_device_ops npcm7xx_pwm_cool_ops = { + .get_max_state = npcm7xx_pwm_cz_get_max_state, + .get_cur_state = npcm7xx_pwm_cz_get_cur_state, + .set_cur_state = npcm7xx_pwm_cz_set_cur_state, +}; + +static int npcm7xx_create_pwm_cooling(struct device *dev, + struct device_node *child, + struct npcm7xx_pwm_fan_data *data, + u32 pwm_port, u8 num_levels) +{ + int ret; + struct npcm7xx_cooling_device *cdev; + + cdev = devm_kzalloc(dev, sizeof(*cdev), GFP_KERNEL); + if (!cdev) + return -ENOMEM; + + cdev->cooling_levels = devm_kzalloc(dev, num_levels, GFP_KERNEL); + if (!cdev->cooling_levels) + return -ENOMEM; + + cdev->max_state = num_levels - 1; + ret = of_property_read_u8_array(child, "cooling-levels", + cdev->cooling_levels, + num_levels); + if (ret) { + dev_err(dev, "Property 'cooling-levels' cannot be read.\n"); + return ret; + } + snprintf(cdev->name, THERMAL_NAME_LENGTH, "%s%d", child->name, + pwm_port); + + cdev->tcdev = thermal_of_cooling_device_register(child, + cdev->name, + cdev, + &npcm7xx_pwm_cool_ops); + if (IS_ERR(cdev->tcdev)) + return PTR_ERR(cdev->tcdev); + + cdev->data = data; + cdev->pwm_port = pwm_port; + + data->cdev[pwm_port] = cdev; + + return 0; +} + +static int npcm7xx_en_pwm_fan(struct device *dev, + struct device_node *child, + struct npcm7xx_pwm_fan_data *data) +{ + u8 *fan_ch; + u32 pwm_port; + int ret, fan_cnt; + u8 index, ch; + + ret = of_property_read_u32(child, "reg", &pwm_port); + if (ret) + return ret; + + data->pwm_present[pwm_port] = true; + ret = npcm7xx_pwm_config_set(data, pwm_port, + NPCM7XX_PWM_CMR_DEFAULT_NUM); + + ret = of_property_count_u8_elems(child, "cooling-levels"); + if (ret > 0) { + ret = npcm7xx_create_pwm_cooling(dev, child, data, pwm_port, + ret); + if (ret) + return ret; + } + + fan_cnt = of_property_count_u8_elems(child, "fan-tach-ch"); + if (fan_cnt < 1) + return -EINVAL; + + fan_ch = devm_kzalloc(dev, sizeof(*fan_ch) * fan_cnt, GFP_KERNEL); + if (!fan_ch) + return -ENOMEM; + + ret = of_property_read_u8_array(child, "fan-tach-ch", fan_ch, fan_cnt); + if (ret) + return ret; + + for (ch = 0; ch < fan_cnt; ch++) { + index = fan_ch[ch]; + data->fan_present[index] = true; + data->fan_dev[index].fan_st_flg = FAN_INIT; + } + + return 0; +} + +static int npcm7xx_pwm_fan_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np, *child; + struct npcm7xx_pwm_fan_data *data; + struct resource *res; + struct device *hwmon; + char name[20]; + int ret, cnt; + u32 output_freq; + u32 i; + + np = dev->of_node; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"); + if (!res) { + dev_err(dev, "pwm resource not found\n"); + return -ENODEV; + } + + data->pwm_base = devm_ioremap_resource(dev, res); + dev_dbg(dev, "pwm base resource is %pR\n", res); + if (IS_ERR(data->pwm_base)) + return PTR_ERR(data->pwm_base); + + data->pwm_clk = devm_clk_get(dev, "pwm"); + if (IS_ERR(data->pwm_clk)) { + dev_err(dev, "couldn't get pwm clock\n"); + return PTR_ERR(data->pwm_clk); + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fan"); + if (!res) { + dev_err(dev, "fan resource not found\n"); + return -ENODEV; + } + + data->fan_base = devm_ioremap_resource(dev, res); + dev_dbg(dev, "fan base resource is %pR\n", res); + if (IS_ERR(data->fan_base)) + return PTR_ERR(data->fan_base); + + data->fan_clk = devm_clk_get(dev, "fan"); + if (IS_ERR(data->fan_clk)) { + dev_err(dev, "couldn't get fan clock\n"); + return PTR_ERR(data->fan_clk); + } + + output_freq = npcm7xx_pwm_init(data); + npcm7xx_fan_init(data); + + for (cnt = 0; cnt < NPCM7XX_PWM_MAX_MODULES ; cnt++) + mutex_init(&data->pwm_lock[cnt]); + + for (i = 0; i < NPCM7XX_FAN_MAX_MODULE; i++) { + spin_lock_init(&data->fan_lock[i]); + + data->fan_irq[i] = platform_get_irq(pdev, i); + if (data->fan_irq[i] < 0) { + dev_err(dev, "get IRQ fan%d failed\n", i); + return data->fan_irq[i]; + } + + sprintf(name, "NPCM7XX-FAN-MD%d", i); + ret = devm_request_irq(dev, data->fan_irq[i], npcm7xx_fan_isr, + 0, name, (void *)data); + if (ret) { + dev_err(dev, "register IRQ fan%d failed\n", i); + return ret; + } + } + + for_each_child_of_node(np, child) { + ret = npcm7xx_en_pwm_fan(dev, child, data); + if (ret) { + dev_err(dev, "enable pwm and fan failed\n"); + of_node_put(child); + return ret; + } + } + + hwmon = devm_hwmon_device_register_with_info(dev, "npcm7xx_pwm_fan", + data, &npcm7xx_chip_info, + NULL); + if (IS_ERR(hwmon)) { + dev_err(dev, "unable to register hwmon device\n"); + return PTR_ERR(hwmon); + } + + for (i = 0; i < NPCM7XX_FAN_MAX_CHN_NUM; i++) { + if (data->fan_present[i]) { + /* fan timer initialization */ + data->fan_timer.expires = jiffies + + msecs_to_jiffies(NPCM7XX_FAN_POLL_TIMER_200MS); + timer_setup(&data->fan_timer, + npcm7xx_fan_polling, 0); + add_timer(&data->fan_timer); + break; + } + } + + pr_info("NPCM7XX PWM-FAN Driver probed, output Freq %dHz[PWM], input Freq %dHz[FAN]\n", + output_freq, data->input_clk_freq); + + return 0; +} + +static const struct of_device_id of_pwm_fan_match_table[] = { + { .compatible = "nuvoton,npcm750-pwm-fan", }, + {}, +}; +MODULE_DEVICE_TABLE(of, of_pwm_fan_match_table); + +static struct platform_driver npcm7xx_pwm_fan_driver = { + .probe = npcm7xx_pwm_fan_probe, + .driver = { + .name = "npcm7xx_pwm_fan", + .of_match_table = of_pwm_fan_match_table, + }, +}; + +module_platform_driver(npcm7xx_pwm_fan_driver); + +MODULE_DESCRIPTION("Nuvoton NPCM7XX PWM and Fan Tacho driver"); +MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig index e71aec69e76e..a82018aaf473 100644 --- a/drivers/hwmon/pmbus/Kconfig +++ b/drivers/hwmon/pmbus/Kconfig @@ -130,7 +130,7 @@ config SENSORS_MAX34440 default n help If you say yes here you get hardware monitoring support for Maxim - MAX34440, MAX34441, MAX34446, MAX34460, and MAX34461. + MAX34440, MAX34441, MAX34446, MAX34451, MAX34460, and MAX34461. This driver can also be built as a module. If so, the module will be called max34440. diff --git a/drivers/hwmon/pmbus/max34440.c b/drivers/hwmon/pmbus/max34440.c index 74a1f6f68fb3..47576c460010 100644 --- a/drivers/hwmon/pmbus/max34440.c +++ b/drivers/hwmon/pmbus/max34440.c @@ -27,7 +27,7 @@ #include <linux/i2c.h> #include "pmbus.h" -enum chips { max34440, max34441, max34446, max34460, max34461 }; +enum chips { max34440, max34441, max34446, max34451, max34460, max34461 }; #define MAX34440_MFR_VOUT_PEAK 0xd4 #define MAX34440_MFR_IOUT_PEAK 0xd5 @@ -44,6 +44,9 @@ enum chips { max34440, max34441, max34446, max34460, max34461 }; #define MAX34440_STATUS_OT_FAULT BIT(5) #define MAX34440_STATUS_OT_WARN BIT(6) +#define MAX34451_MFR_CHANNEL_CONFIG 0xe4 +#define MAX34451_MFR_CHANNEL_CONFIG_SEL_MASK 0x3f + struct max34440_data { int id; struct pmbus_driver_info info; @@ -67,7 +70,7 @@ static int max34440_read_word_data(struct i2c_client *client, int page, int reg) MAX34440_MFR_VOUT_PEAK); break; case PMBUS_VIRT_READ_IOUT_AVG: - if (data->id != max34446) + if (data->id != max34446 && data->id != max34451) return -ENXIO; ret = pmbus_read_word_data(client, page, MAX34446_MFR_IOUT_AVG); @@ -143,7 +146,7 @@ static int max34440_write_word_data(struct i2c_client *client, int page, case PMBUS_VIRT_RESET_IOUT_HISTORY: ret = pmbus_write_word_data(client, page, MAX34440_MFR_IOUT_PEAK, 0); - if (!ret && data->id == max34446) + if (!ret && (data->id == max34446 || data->id == max34451)) ret = pmbus_write_word_data(client, page, MAX34446_MFR_IOUT_AVG, 0); @@ -202,6 +205,58 @@ static int max34440_read_byte_data(struct i2c_client *client, int page, int reg) return ret; } +static int max34451_set_supported_funcs(struct i2c_client *client, + struct max34440_data *data) +{ + /* + * Each of the channel 0-15 can be configured to monitor the following + * functions based on MFR_CHANNEL_CONFIG[5:0] + * 0x10: Sequencing + voltage monitoring (only valid for PAGES 0–11) + * 0x20: Voltage monitoring (no sequencing) + * 0x21: Voltage read only + * 0x22: Current monitoring + * 0x23: Current read only + * 0x30: General-purpose input active low + * 0x34: General-purpose input active high + * 0x00: Disabled + */ + + int page, rv; + + for (page = 0; page < 16; page++) { + rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); + if (rv < 0) + return rv; + + rv = i2c_smbus_read_word_data(client, + MAX34451_MFR_CHANNEL_CONFIG); + if (rv < 0) + return rv; + + switch (rv & MAX34451_MFR_CHANNEL_CONFIG_SEL_MASK) { + case 0x10: + case 0x20: + data->info.func[page] = PMBUS_HAVE_VOUT | + PMBUS_HAVE_STATUS_VOUT; + break; + case 0x21: + data->info.func[page] = PMBUS_HAVE_VOUT; + break; + case 0x22: + data->info.func[page] = PMBUS_HAVE_IOUT | + PMBUS_HAVE_STATUS_IOUT; + break; + case 0x23: + data->info.func[page] = PMBUS_HAVE_IOUT; + break; + default: + break; + } + } + + return 0; +} + static struct pmbus_driver_info max34440_info[] = { [max34440] = { .pages = 14, @@ -325,6 +380,30 @@ static struct pmbus_driver_info max34440_info[] = { .read_word_data = max34440_read_word_data, .write_word_data = max34440_write_word_data, }, + [max34451] = { + .pages = 21, + .format[PSC_VOLTAGE_OUT] = direct, + .format[PSC_TEMPERATURE] = direct, + .format[PSC_CURRENT_OUT] = direct, + .m[PSC_VOLTAGE_OUT] = 1, + .b[PSC_VOLTAGE_OUT] = 0, + .R[PSC_VOLTAGE_OUT] = 3, + .m[PSC_CURRENT_OUT] = 1, + .b[PSC_CURRENT_OUT] = 0, + .R[PSC_CURRENT_OUT] = 2, + .m[PSC_TEMPERATURE] = 1, + .b[PSC_TEMPERATURE] = 0, + .R[PSC_TEMPERATURE] = 2, + /* func 0-15 is set dynamically before probing */ + .func[16] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP, + .func[17] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP, + .func[18] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP, + .func[19] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP, + .func[20] = PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP, + .read_byte_data = max34440_read_byte_data, + .read_word_data = max34440_read_word_data, + .write_word_data = max34440_write_word_data, + }, [max34460] = { .pages = 18, .format[PSC_VOLTAGE_OUT] = direct, @@ -398,6 +477,7 @@ static int max34440_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct max34440_data *data; + int rv; data = devm_kzalloc(&client->dev, sizeof(struct max34440_data), GFP_KERNEL); @@ -406,6 +486,12 @@ static int max34440_probe(struct i2c_client *client, data->id = id->driver_data; data->info = max34440_info[id->driver_data]; + if (data->id == max34451) { + rv = max34451_set_supported_funcs(client, data); + if (rv) + return rv; + } + return pmbus_do_probe(client, id, &data->info); } @@ -413,6 +499,7 @@ static const struct i2c_device_id max34440_id[] = { {"max34440", max34440}, {"max34441", max34441}, {"max34446", max34446}, + {"max34451", max34451}, {"max34460", max34460}, {"max34461", max34461}, {} |