diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device')
10 files changed, 69 insertions, 139 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 99a07694a298..3b83f17b3a23 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -82,7 +82,7 @@ nv4_chipset = { .devinit = nv04_devinit_new, .fb = nv04_fb_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -102,7 +102,7 @@ nv5_chipset = { .devinit = nv05_devinit_new, .fb = nv04_fb_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -123,7 +123,7 @@ nv10_chipset = { .fb = nv10_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -142,7 +142,7 @@ nv11_chipset = { .fb = nv10_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -163,7 +163,7 @@ nv15_chipset = { .fb = nv10_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -184,7 +184,7 @@ nv17_chipset = { .fb = nv10_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -205,7 +205,7 @@ nv18_chipset = { .fb = nv10_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -226,7 +226,7 @@ nv1a_chipset = { .fb = nv1a_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -247,7 +247,7 @@ nv1f_chipset = { .fb = nv1a_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -268,7 +268,7 @@ nv20_chipset = { .fb = nv20_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -289,7 +289,7 @@ nv25_chipset = { .fb = nv25_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -310,7 +310,7 @@ nv28_chipset = { .fb = nv25_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -331,7 +331,7 @@ nv2a_chipset = { .fb = nv25_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -352,7 +352,7 @@ nv30_chipset = { .fb = nv30_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -373,7 +373,7 @@ nv31_chipset = { .fb = nv30_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -395,7 +395,7 @@ nv34_chipset = { .fb = nv10_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -417,7 +417,7 @@ nv35_chipset = { .fb = nv35_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -438,7 +438,7 @@ nv36_chipset = { .fb = nv36_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv04_instmem_new, + .imem = nv04_instmem_new, // .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, @@ -460,7 +460,7 @@ nv40_chipset = { .fb = nv40_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv04_mmu_new, // .therm = nv40_therm_new, @@ -485,7 +485,7 @@ nv41_chipset = { .fb = nv41_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, @@ -510,7 +510,7 @@ nv42_chipset = { .fb = nv41_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, @@ -535,7 +535,7 @@ nv43_chipset = { .fb = nv41_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, @@ -560,7 +560,7 @@ nv44_chipset = { .fb = nv44_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv44_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -585,7 +585,7 @@ nv45_chipset = { .fb = nv40_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv04_mmu_new, // .therm = nv40_therm_new, @@ -610,7 +610,7 @@ nv46_chipset = { .fb = nv46_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv44_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -635,7 +635,7 @@ nv47_chipset = { .fb = nv47_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, @@ -660,7 +660,7 @@ nv49_chipset = { .fb = nv49_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, @@ -685,7 +685,7 @@ nv4a_chipset = { .fb = nv44_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv44_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -710,7 +710,7 @@ nv4b_chipset = { .fb = nv49_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, @@ -735,7 +735,7 @@ nv4c_chipset = { .fb = nv46_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -760,7 +760,7 @@ nv4e_chipset = { .fb = nv4e_fb_new, .gpio = nv10_gpio_new, .i2c = nv4e_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -787,7 +787,7 @@ nv50_chipset = { .fuse = nv50_fuse_new, .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -813,7 +813,7 @@ nv63_chipset = { .fb = nv46_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -838,7 +838,7 @@ nv67_chipset = { .fb = nv46_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -863,7 +863,7 @@ nv68_chipset = { .fb = nv46_fb_new, .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, -// .imem = nv40_instmem_new, + .imem = nv40_instmem_new, // .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, @@ -890,7 +890,7 @@ nv84_chipset = { .fuse = nv50_fuse_new, .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -921,7 +921,7 @@ nv86_chipset = { .fuse = nv50_fuse_new, .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -952,7 +952,7 @@ nv92_chipset = { .fuse = nv50_fuse_new, .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -983,7 +983,7 @@ nv94_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g94_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1017,7 +1017,7 @@ nv96_chipset = { .bus = g94_bus_new, // .timer = nv04_timer_new, .fb = g84_fb_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mmu = nv50_mmu_new, .bar = g84_bar_new, // .volt = nv40_volt_new, @@ -1048,7 +1048,7 @@ nv98_chipset = { .bus = g94_bus_new, // .timer = nv04_timer_new, .fb = g84_fb_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mmu = nv50_mmu_new, .bar = g84_bar_new, // .volt = nv40_volt_new, @@ -1076,7 +1076,7 @@ nva0_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = nv50_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1107,7 +1107,7 @@ nva3_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1140,7 +1140,7 @@ nva5_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1172,7 +1172,7 @@ nva8_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1204,7 +1204,7 @@ nvaa_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1235,7 +1235,7 @@ nvac_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1266,7 +1266,7 @@ nvaf_chipset = { .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, @@ -1299,7 +1299,7 @@ nvc0_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, @@ -1334,7 +1334,7 @@ nvc1_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1368,7 +1368,7 @@ nvc3_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1402,7 +1402,7 @@ nvc4_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, @@ -1437,7 +1437,7 @@ nvc8_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, @@ -1472,7 +1472,7 @@ nvce_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, // .mmu = gf100_mmu_new, @@ -1507,7 +1507,7 @@ nvcf_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1541,7 +1541,7 @@ nvd7_chipset = { .gpio = gf119_gpio_new, .i2c = gf117_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1573,7 +1573,7 @@ nvd9_chipset = { .gpio = gf119_gpio_new, .i2c = gf119_i2c_new, .ibus = gf100_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1607,7 +1607,7 @@ nve4_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1643,7 +1643,7 @@ nve6_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1679,7 +1679,7 @@ nve7_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1711,7 +1711,7 @@ nvea_chipset = { .fb = gk20a_fb_new, .fuse = gf100_fuse_new, .ibus = gk20a_ibus_new, -// .imem = gk20a_instmem_new, + .imem = gk20a_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, @@ -1739,7 +1739,7 @@ nvf0_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1775,7 +1775,7 @@ nvf1_chipset = { .gpio = gk104_gpio_new, .i2c = gf119_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, // .mmu = gf100_mmu_new, @@ -1811,7 +1811,7 @@ nv106_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, @@ -1846,7 +1846,7 @@ nv108_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, @@ -1881,7 +1881,7 @@ nv117_chipset = { .gpio = gk104_gpio_new, .i2c = gf119_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, @@ -1910,7 +1910,7 @@ nv124_chipset = { .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, @@ -1939,7 +1939,7 @@ nv126_chipset = { .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, .ibus = gk104_ibus_new, -// .imem = nv50_instmem_new, + .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, @@ -1964,7 +1964,7 @@ nv12b_chipset = { .fb = gk20a_fb_new, .fuse = gm107_fuse_new, .ibus = gk20a_ibus_new, -// .imem = gk20a_instmem_new, + .imem = gk20a_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c index a0f54fd80810..8f9d871b545f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c @@ -33,7 +33,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -55,7 +54,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -77,7 +75,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -98,7 +95,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -120,7 +116,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -141,7 +136,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -162,7 +156,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -184,7 +177,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -205,7 +197,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c index f2f524b21950..dcb0f6db213d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c @@ -33,7 +33,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -56,7 +55,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -79,7 +77,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -100,7 +97,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass; @@ -117,7 +113,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -140,7 +135,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -163,7 +157,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -185,7 +178,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c index 9c0306279de8..158af1f8799e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c @@ -33,7 +33,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; @@ -66,7 +65,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; #if 0 @@ -96,7 +94,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; #if 0 @@ -122,7 +119,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gm20b_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c index de456b2d44b3..dc90bad93869 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c @@ -30,7 +30,6 @@ nv04_identify(struct nvkm_device *device) case 0x04: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv04_fifo_oclass; @@ -41,7 +40,6 @@ nv04_identify(struct nvkm_device *device) case 0x05: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv04_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c index 6e58a0e20ba2..b1db20f4a15c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c @@ -30,7 +30,6 @@ nv10_identify(struct nvkm_device *device) case 0x10: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; @@ -39,7 +38,6 @@ nv10_identify(struct nvkm_device *device) case 0x15: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; @@ -50,7 +48,6 @@ nv10_identify(struct nvkm_device *device) case 0x16: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; @@ -61,7 +58,6 @@ nv10_identify(struct nvkm_device *device) case 0x1a: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; @@ -72,7 +68,6 @@ nv10_identify(struct nvkm_device *device) case 0x11: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; @@ -83,7 +78,6 @@ nv10_identify(struct nvkm_device *device) case 0x17: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -94,7 +88,6 @@ nv10_identify(struct nvkm_device *device) case 0x1f: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -105,7 +98,6 @@ nv10_identify(struct nvkm_device *device) case 0x18: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c index 146773775922..f11b7d01f34a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c @@ -30,7 +30,6 @@ nv20_identify(struct nvkm_device *device) case 0x20: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -41,7 +40,6 @@ nv20_identify(struct nvkm_device *device) case 0x25: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -52,7 +50,6 @@ nv20_identify(struct nvkm_device *device) case 0x28: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -63,7 +60,6 @@ nv20_identify(struct nvkm_device *device) case 0x2a: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c index e4d5fc697f49..780dd1019666 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c @@ -30,7 +30,6 @@ nv30_identify(struct nvkm_device *device) case 0x30: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -41,7 +40,6 @@ nv30_identify(struct nvkm_device *device) case 0x35: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -52,7 +50,6 @@ nv30_identify(struct nvkm_device *device) case 0x31: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -64,7 +61,6 @@ nv30_identify(struct nvkm_device *device) case 0x36: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; @@ -76,7 +72,6 @@ nv30_identify(struct nvkm_device *device) case 0x34: device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c index 0bf4fcefcf88..a5d874a2c297 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c @@ -31,7 +31,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -46,7 +45,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -61,7 +59,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -76,7 +73,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -91,7 +87,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -106,7 +101,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -121,7 +115,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -136,7 +129,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -151,7 +143,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -166,7 +157,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -181,7 +171,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -196,7 +185,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -211,7 +199,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -226,7 +213,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -241,7 +227,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; @@ -256,7 +241,6 @@ nv40_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv40_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index 956ea9c02f45..2507559e5894 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c @@ -32,7 +32,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -48,7 +47,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -67,7 +65,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -86,7 +83,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -105,7 +101,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -124,7 +119,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -143,7 +137,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -162,7 +155,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -181,7 +173,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -200,7 +191,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; @@ -219,7 +209,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -240,7 +229,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -260,7 +248,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; @@ -280,7 +267,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gt215_pmu_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; |