diff options
Diffstat (limited to 'drivers/gpu/drm/hisilicon')
-rw-r--r-- | drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 87 | ||||
-rw-r--r-- | drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c | 99 | ||||
-rw-r--r-- | drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 42 | ||||
-rw-r--r-- | drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 4 |
7 files changed, 215 insertions, 70 deletions
diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile b/drivers/gpu/drm/hisilicon/hibmc/Makefile index f99132715597..684ef794eb7c 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/Makefile +++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_ttm.o +hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_ttm.o hibmc_drm_i2c.o obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc-drm.o diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c index 4d57ec688f82..a1eabadf5adb 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c @@ -23,15 +23,15 @@ #include "hibmc_drm_regs.h" struct hibmc_display_panel_pll { - unsigned long M; - unsigned long N; - unsigned long OD; - unsigned long POD; + u64 M; + u64 N; + u64 OD; + u64 POD; }; struct hibmc_dislay_pll_config { - unsigned long hdisplay; - unsigned long vdisplay; + u64 hdisplay; + u64 vdisplay; u32 pll1_config_value; u32 pll2_config_value; }; @@ -52,8 +52,6 @@ static const struct hibmc_dislay_pll_config hibmc_pll_table[] = { {1920, 1200, CRT_PLL1_HS_193MHZ, CRT_PLL2_HS_193MHZ}, }; -#define PADDING(align, data) (((data) + (align) - 1) & (~((align) - 1))) - static int hibmc_plane_atomic_check(struct drm_plane *plane, struct drm_plane_state *state) { @@ -104,8 +102,8 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *state = plane->state; u32 reg; s64 gpu_addr = 0; - unsigned int line_l; - struct hibmc_drm_private *priv = plane->dev->dev_private; + u32 line_l; + struct hibmc_drm_private *priv = to_hibmc_drm_private(plane->dev); struct drm_gem_vram_object *gbo; if (!state->fb) @@ -157,10 +155,10 @@ static const struct drm_plane_helper_funcs hibmc_plane_helper_funcs = { .atomic_update = hibmc_plane_atomic_update, }; -static void hibmc_crtc_dpms(struct drm_crtc *crtc, int dpms) +static void hibmc_crtc_dpms(struct drm_crtc *crtc, u32 dpms) { - struct hibmc_drm_private *priv = crtc->dev->dev_private; - unsigned int reg; + struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev); + u32 reg; reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL); reg &= ~HIBMC_CRT_DISP_CTL_DPMS_MASK; @@ -172,10 +170,10 @@ static void hibmc_crtc_dpms(struct drm_crtc *crtc, int dpms) } static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc, - struct drm_crtc_state *old_state) + struct drm_atomic_state *state) { - unsigned int reg; - struct hibmc_drm_private *priv = crtc->dev->dev_private; + u32 reg; + struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev); hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0); @@ -191,10 +189,10 @@ static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc, } static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc, - struct drm_crtc_state *old_state) + struct drm_atomic_state *state) { - unsigned int reg; - struct hibmc_drm_private *priv = crtc->dev->dev_private; + u32 reg; + struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev); hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_OFF); drm_crtc_vblank_off(crtc); @@ -214,7 +212,7 @@ static enum drm_mode_status hibmc_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) { - int i = 0; + size_t i = 0; int vrefresh = drm_mode_vrefresh(mode); if (vrefresh < 59 || vrefresh > 61) @@ -229,9 +227,9 @@ hibmc_crtc_mode_valid(struct drm_crtc *crtc, return MODE_BAD; } -static unsigned int format_pll_reg(void) +static u32 format_pll_reg(void) { - unsigned int pllreg = 0; + u32 pllreg = 0; struct hibmc_display_panel_pll pll = {0}; /* @@ -251,10 +249,10 @@ static unsigned int format_pll_reg(void) return pllreg; } -static void set_vclock_hisilicon(struct drm_device *dev, unsigned long pll) +static void set_vclock_hisilicon(struct drm_device *dev, u64 pll) { u32 val; - struct hibmc_drm_private *priv = dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); val = readl(priv->mmio + CRT_PLL1_HS); val &= ~(CRT_PLL1_HS_OUTER_BYPASS(1)); @@ -281,11 +279,10 @@ static void set_vclock_hisilicon(struct drm_device *dev, unsigned long pll) writel(val, priv->mmio + CRT_PLL1_HS); } -static void get_pll_config(unsigned long x, unsigned long y, - u32 *pll1, u32 *pll2) +static void get_pll_config(u64 x, u64 y, u32 *pll1, u32 *pll2) { - int i; - int count = ARRAY_SIZE(hibmc_pll_table); + size_t i; + size_t count = ARRAY_SIZE(hibmc_pll_table); for (i = 0; i < count; i++) { if (hibmc_pll_table[i].hdisplay == x && @@ -308,14 +305,14 @@ static void get_pll_config(unsigned long x, unsigned long y, * FPGA only supports 7 predefined pixel clocks, and clock select is * in bit 4:0 of new register 0x802a8. */ -static unsigned int display_ctrl_adjust(struct drm_device *dev, - struct drm_display_mode *mode, - unsigned int ctrl) +static u32 display_ctrl_adjust(struct drm_device *dev, + struct drm_display_mode *mode, + u32 ctrl) { - unsigned long x, y; + u64 x, y; u32 pll1; /* bit[31:0] of PLL */ u32 pll2; /* bit[63:32] of PLL */ - struct hibmc_drm_private *priv = dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); x = mode->hdisplay; y = mode->vdisplay; @@ -360,12 +357,12 @@ static unsigned int display_ctrl_adjust(struct drm_device *dev, static void hibmc_crtc_mode_set_nofb(struct drm_crtc *crtc) { - unsigned int val; + u32 val; struct drm_display_mode *mode = &crtc->state->mode; struct drm_device *dev = crtc->dev; - struct hibmc_drm_private *priv = dev->dev_private; - int width = mode->hsync_end - mode->hsync_start; - int height = mode->vsync_end - mode->vsync_start; + struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); + u32 width = mode->hsync_end - mode->hsync_start; + u32 height = mode->vsync_end - mode->vsync_start; writel(format_pll_reg(), priv->mmio + HIBMC_CRT_PLL_CTRL); writel(HIBMC_FIELD(HIBMC_CRT_HORZ_TOTAL_TOTAL, mode->htotal - 1) | @@ -395,9 +392,9 @@ static void hibmc_crtc_mode_set_nofb(struct drm_crtc *crtc) static void hibmc_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { - unsigned int reg; + u32 reg; struct drm_device *dev = crtc->dev; - struct hibmc_drm_private *priv = dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0); @@ -427,7 +424,7 @@ static void hibmc_crtc_atomic_flush(struct drm_crtc *crtc, static int hibmc_crtc_enable_vblank(struct drm_crtc *crtc) { - struct hibmc_drm_private *priv = crtc->dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev); writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(1), priv->mmio + HIBMC_RAW_INTERRUPT_EN); @@ -437,7 +434,7 @@ static int hibmc_crtc_enable_vblank(struct drm_crtc *crtc) static void hibmc_crtc_disable_vblank(struct drm_crtc *crtc) { - struct hibmc_drm_private *priv = crtc->dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev); writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(0), priv->mmio + HIBMC_RAW_INTERRUPT_EN); @@ -445,18 +442,18 @@ static void hibmc_crtc_disable_vblank(struct drm_crtc *crtc) static void hibmc_crtc_load_lut(struct drm_crtc *crtc) { - struct hibmc_drm_private *priv = crtc->dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(crtc->dev); void __iomem *mmio = priv->mmio; u16 *r, *g, *b; - unsigned int reg; - int i; + u32 reg; + u32 i; r = crtc->gamma_store; g = r + crtc->gamma_size; b = g + crtc->gamma_size; for (i = 0; i < crtc->gamma_size; i++) { - unsigned int offset = i << 2; + u32 offset = i << 2; u8 red = *r++ >> 8; u8 green = *g++ >> 8; u8 blue = *b++ >> 8; diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c index 085d1b2fa8c0..0c1b40d25ac4 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c @@ -29,8 +29,7 @@ DEFINE_DRM_GEM_FOPS(hibmc_fops); static irqreturn_t hibmc_drm_interrupt(int irq, void *arg) { struct drm_device *dev = (struct drm_device *)arg; - struct hibmc_drm_private *priv = - (struct hibmc_drm_private *)dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); u32 status; status = readl(priv->mmio + HIBMC_RAW_INTERRUPT); @@ -122,12 +121,11 @@ static void hibmc_kms_fini(struct hibmc_drm_private *priv) /* * It can operate in one of three modes: 0, 1 or Sleep. */ -void hibmc_set_power_mode(struct hibmc_drm_private *priv, - unsigned int power_mode) +void hibmc_set_power_mode(struct hibmc_drm_private *priv, u32 power_mode) { - unsigned int control_value = 0; + u32 control_value = 0; void __iomem *mmio = priv->mmio; - unsigned int input = 1; + u32 input = 1; if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP) return; @@ -145,8 +143,8 @@ void hibmc_set_power_mode(struct hibmc_drm_private *priv, void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate) { - unsigned int gate_reg; - unsigned int mode; + u32 gate_reg; + u32 mode; void __iomem *mmio = priv->mmio; /* Get current power mode. */ @@ -171,7 +169,7 @@ void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate) static void hibmc_hw_config(struct hibmc_drm_private *priv) { - unsigned int reg; + u32 reg; /* On hardware reset, power mode 0 is default. */ hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0); @@ -244,7 +242,7 @@ static int hibmc_hw_init(struct hibmc_drm_private *priv) static int hibmc_unload(struct drm_device *dev) { - struct hibmc_drm_private *priv = dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); drm_atomic_helper_shutdown(dev); diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h index 197485e2fe0b..f310a83d9c48 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h @@ -14,31 +14,51 @@ #ifndef HIBMC_DRM_DRV_H #define HIBMC_DRM_DRV_H +#include <linux/gpio/consumer.h> +#include <linux/i2c-algo-bit.h> +#include <linux/i2c.h> + +#include <drm/drm_edid.h> #include <drm/drm_fb_helper.h> #include <drm/drm_framebuffer.h> -struct drm_device; +struct hibmc_connector { + struct drm_connector base; + + struct i2c_adapter adapter; + struct i2c_algo_bit_data bit_data; +}; struct hibmc_drm_private { /* hw */ void __iomem *mmio; void __iomem *fb_map; - unsigned long fb_base; - unsigned long fb_size; + resource_size_t fb_base; + resource_size_t fb_size; /* drm */ struct drm_device *dev; struct drm_plane primary_plane; struct drm_crtc crtc; struct drm_encoder encoder; - struct drm_connector connector; + struct hibmc_connector connector; bool mode_config_initialized; }; +static inline struct hibmc_connector *to_hibmc_connector(struct drm_connector *connector) +{ + return container_of(connector, struct hibmc_connector, base); +} + +static inline struct hibmc_drm_private *to_hibmc_drm_private(struct drm_device *dev) +{ + return dev->dev_private; +} + void hibmc_set_power_mode(struct hibmc_drm_private *priv, - unsigned int power_mode); + u32 power_mode); void hibmc_set_current_gate(struct hibmc_drm_private *priv, - unsigned int gate); + u32 gate); int hibmc_de_init(struct hibmc_drm_private *priv); int hibmc_vdac_init(struct hibmc_drm_private *priv); @@ -47,6 +67,7 @@ int hibmc_mm_init(struct hibmc_drm_private *hibmc); void hibmc_mm_fini(struct hibmc_drm_private *hibmc); int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev, struct drm_mode_create_dumb *args); +int hibmc_ddc_create(struct drm_device *drm_dev, struct hibmc_connector *connector); extern const struct drm_mode_config_funcs hibmc_mode_funcs; diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c new file mode 100644 index 000000000000..86d712090d87 --- /dev/null +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* Hisilicon Hibmc SoC drm driver + * + * Based on the bochs drm driver. + * + * Copyright (c) 2016 Huawei Limited. + * + * Author: + * Tian Tao <tiantao6@hisilicon.com> + */ + +#include <linux/delay.h> +#include <linux/pci.h> + +#include <drm/drm_atomic_helper.h> +#include <drm/drm_probe_helper.h> + +#include "hibmc_drm_drv.h" + +#define GPIO_DATA 0x0802A0 +#define GPIO_DATA_DIRECTION 0x0802A4 + +#define I2C_SCL_MASK BIT(0) +#define I2C_SDA_MASK BIT(1) + +static void hibmc_set_i2c_signal(void *data, u32 mask, int value) +{ + struct hibmc_connector *hibmc_connector = data; + struct hibmc_drm_private *priv = to_hibmc_drm_private(hibmc_connector->base.dev); + u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION); + + if (value) { + tmp_dir &= ~mask; + writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); + } else { + u32 tmp_data = readl(priv->mmio + GPIO_DATA); + + tmp_data &= ~mask; + writel(tmp_data, priv->mmio + GPIO_DATA); + + tmp_dir |= mask; + writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); + } +} + +static int hibmc_get_i2c_signal(void *data, u32 mask) +{ + struct hibmc_connector *hibmc_connector = data; + struct hibmc_drm_private *priv = to_hibmc_drm_private(hibmc_connector->base.dev); + u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION); + + if ((tmp_dir & mask) != mask) { + tmp_dir &= ~mask; + writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); + } + + return (readl(priv->mmio + GPIO_DATA) & mask) ? 1 : 0; +} + +static void hibmc_ddc_setsda(void *data, int state) +{ + hibmc_set_i2c_signal(data, I2C_SDA_MASK, state); +} + +static void hibmc_ddc_setscl(void *data, int state) +{ + hibmc_set_i2c_signal(data, I2C_SCL_MASK, state); +} + +static int hibmc_ddc_getsda(void *data) +{ + return hibmc_get_i2c_signal(data, I2C_SDA_MASK); +} + +static int hibmc_ddc_getscl(void *data) +{ + return hibmc_get_i2c_signal(data, I2C_SCL_MASK); +} + +int hibmc_ddc_create(struct drm_device *drm_dev, + struct hibmc_connector *connector) +{ + connector->adapter.owner = THIS_MODULE; + connector->adapter.class = I2C_CLASS_DDC; + snprintf(connector->adapter.name, I2C_NAME_SIZE, "HIS i2c bit bus"); + connector->adapter.dev.parent = &drm_dev->pdev->dev; + i2c_set_adapdata(&connector->adapter, connector); + connector->adapter.algo_data = &connector->bit_data; + + connector->bit_data.udelay = 20; + connector->bit_data.timeout = usecs_to_jiffies(2000); + connector->bit_data.data = connector; + connector->bit_data.setsda = hibmc_ddc_setsda; + connector->bit_data.setscl = hibmc_ddc_setscl; + connector->bit_data.getsda = hibmc_ddc_getsda; + connector->bit_data.getscl = hibmc_ddc_getscl; + + return i2c_bit_add_bus(&connector->adapter); +} diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c index 376a05ddbc2f..74e26c27d878 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c @@ -21,21 +21,41 @@ static int hibmc_connector_get_modes(struct drm_connector *connector) { int count; + void *edid; + struct hibmc_connector *hibmc_connector = to_hibmc_connector(connector); + + edid = drm_get_edid(connector, &hibmc_connector->adapter); + if (edid) { + drm_connector_update_edid_property(connector, edid); + count = drm_add_edid_modes(connector, edid); + if (count) + goto out; + } count = drm_add_modes_noedid(connector, connector->dev->mode_config.max_width, connector->dev->mode_config.max_height); drm_set_preferred_mode(connector, 1024, 768); +out: + kfree(edid); return count; } static enum drm_mode_status hibmc_connector_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode) + struct drm_display_mode *mode) { return MODE_OK; } +static void hibmc_connector_destroy(struct drm_connector *connector) +{ + struct hibmc_connector *hibmc_connector = to_hibmc_connector(connector); + + i2c_del_adapter(&hibmc_connector->adapter); + drm_connector_cleanup(connector); +} + static const struct drm_connector_helper_funcs hibmc_connector_helper_funcs = { .get_modes = hibmc_connector_get_modes, @@ -44,7 +64,7 @@ static const struct drm_connector_helper_funcs static const struct drm_connector_funcs hibmc_connector_funcs = { .fill_modes = drm_helper_probe_single_connector_modes, - .destroy = drm_connector_cleanup, + .destroy = hibmc_connector_destroy, .reset = drm_atomic_helper_connector_reset, .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, @@ -56,7 +76,7 @@ static void hibmc_encoder_mode_set(struct drm_encoder *encoder, { u32 reg; struct drm_device *dev = encoder->dev; - struct hibmc_drm_private *priv = dev->dev_private; + struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); reg = readl(priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE); reg |= HIBMC_DISPLAY_CONTROL_FPVDDEN(1); @@ -77,10 +97,17 @@ static const struct drm_encoder_funcs hibmc_encoder_funcs = { int hibmc_vdac_init(struct hibmc_drm_private *priv) { struct drm_device *dev = priv->dev; + struct hibmc_connector *hibmc_connector = &priv->connector; struct drm_encoder *encoder = &priv->encoder; - struct drm_connector *connector = &priv->connector; + struct drm_connector *connector = &hibmc_connector->base; int ret; + ret = hibmc_ddc_create(dev, hibmc_connector); + if (ret) { + drm_err(dev, "failed to create ddc: %d\n", ret); + return ret; + } + encoder->possible_crtcs = 0x1; ret = drm_encoder_init(dev, encoder, &hibmc_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); @@ -91,12 +118,15 @@ int hibmc_vdac_init(struct hibmc_drm_private *priv) drm_encoder_helper_add(encoder, &hibmc_encoder_helper_funcs); - ret = drm_connector_init(dev, connector, &hibmc_connector_funcs, - DRM_MODE_CONNECTOR_VGA); + ret = drm_connector_init_with_ddc(dev, connector, + &hibmc_connector_funcs, + DRM_MODE_CONNECTOR_VGA, + &hibmc_connector->adapter); if (ret) { drm_err(dev, "failed to init connector: %d\n", ret); return ret; } + drm_connector_helper_add(connector, &hibmc_connector_helper_funcs); drm_connector_attach_encoder(connector, encoder); diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c index e1108c1735ad..cfe8ff596d55 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c @@ -436,7 +436,7 @@ static void ade_dump_regs(void __iomem *base) { } #endif static void ade_crtc_atomic_enable(struct drm_crtc *crtc, - struct drm_crtc_state *old_state) + struct drm_atomic_state *state) { struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); struct ade_hw_ctx *ctx = kcrtc->hw_ctx; @@ -459,7 +459,7 @@ static void ade_crtc_atomic_enable(struct drm_crtc *crtc, } static void ade_crtc_atomic_disable(struct drm_crtc *crtc, - struct drm_crtc_state *old_state) + struct drm_atomic_state *state) { struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); struct ade_hw_ctx *ctx = kcrtc->hw_ctx; |