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path: root/drivers/gpu/drm/amd/display/dc/dc.h
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h120
1 files changed, 60 insertions, 60 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 21d78289b048..3ab52d9a82cf 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -45,7 +45,7 @@
/* forward declaration */
struct aux_payload;
-#define DC_VER "3.2.141"
+#define DC_VER "3.2.149"
#define MAX_SURFACES 3
#define MAX_PLANES 6
@@ -460,7 +460,65 @@ union mem_low_power_enable_options {
uint32_t u32All;
};
+struct dc_debug_data {
+ uint32_t ltFailCount;
+ uint32_t i2cErrorCount;
+ uint32_t auxErrorCount;
+};
+
+struct dc_phy_addr_space_config {
+ struct {
+ uint64_t start_addr;
+ uint64_t end_addr;
+ uint64_t fb_top;
+ uint64_t fb_offset;
+ uint64_t fb_base;
+ uint64_t agp_top;
+ uint64_t agp_bot;
+ uint64_t agp_base;
+ } system_aperture;
+
+ struct {
+ uint64_t page_table_start_addr;
+ uint64_t page_table_end_addr;
+ uint64_t page_table_base_addr;
+ bool base_addr_is_mc_addr;
+ } gart_config;
+
+ bool valid;
+ bool is_hvm_enabled;
+ uint64_t page_table_default_page_addr;
+};
+
+struct dc_virtual_addr_space_config {
+ uint64_t page_table_base_addr;
+ uint64_t page_table_start_addr;
+ uint64_t page_table_end_addr;
+ uint32_t page_table_block_size_in_bytes;
+ uint8_t page_table_depth; // 1 = 1 level, 2 = 2 level, etc. 0 = invalid
+};
+
+struct dc_bounding_box_overrides {
+ int sr_exit_time_ns;
+ int sr_enter_plus_exit_time_ns;
+ int urgent_latency_ns;
+ int percent_of_ideal_drambw;
+ int dram_clock_change_latency_ns;
+ int dummy_clock_change_latency_ns;
+ /* This forces a hard min on the DCFCLK we use
+ * for DML. Unlike the debug option for forcing
+ * DCFCLK, this override affects watermark calculations
+ */
+ int min_dcfclk_mhz;
+};
+
+struct dc_state;
+struct resource_pool;
+struct dce_hwseq;
+
struct dc_debug_options {
+ bool native422_support;
+ bool disable_dsc;
enum visual_confirm visual_confirm;
bool sanity_checks;
bool max_disp_clk;
@@ -486,7 +544,6 @@ struct dc_debug_options {
bool disable_dsc_power_gate;
int dsc_min_slice_height_override;
int dsc_bpp_increment_div;
- bool native422_support;
bool disable_pplib_wm_range;
enum wm_report_mode pplib_wm_report_mode;
unsigned int min_disp_clk_khz;
@@ -556,7 +613,6 @@ struct dc_debug_options {
bool validate_dml_output;
bool enable_dmcub_surface_flip;
bool usbc_combo_phy_reset_wa;
- bool disable_dsc;
bool enable_dram_clock_change_one_display_vactive;
union mem_low_power_enable_options enable_mem_low_power;
bool force_vblank_alignment;
@@ -574,69 +630,13 @@ struct dc_debug_options {
#endif
};
-struct dc_debug_data {
- uint32_t ltFailCount;
- uint32_t i2cErrorCount;
- uint32_t auxErrorCount;
-};
-
-struct dc_phy_addr_space_config {
- struct {
- uint64_t start_addr;
- uint64_t end_addr;
- uint64_t fb_top;
- uint64_t fb_offset;
- uint64_t fb_base;
- uint64_t agp_top;
- uint64_t agp_bot;
- uint64_t agp_base;
- } system_aperture;
-
- struct {
- uint64_t page_table_start_addr;
- uint64_t page_table_end_addr;
- uint64_t page_table_base_addr;
-#if defined(CONFIG_DRM_AMD_DC_DCN)
- bool base_addr_is_mc_addr;
-#endif
- } gart_config;
-
- bool valid;
- bool is_hvm_enabled;
- uint64_t page_table_default_page_addr;
-};
-
-struct dc_virtual_addr_space_config {
- uint64_t page_table_base_addr;
- uint64_t page_table_start_addr;
- uint64_t page_table_end_addr;
- uint32_t page_table_block_size_in_bytes;
- uint8_t page_table_depth; // 1 = 1 level, 2 = 2 level, etc. 0 = invalid
-};
-
-struct dc_bounding_box_overrides {
- int sr_exit_time_ns;
- int sr_enter_plus_exit_time_ns;
- int urgent_latency_ns;
- int percent_of_ideal_drambw;
- int dram_clock_change_latency_ns;
- int dummy_clock_change_latency_ns;
- /* This forces a hard min on the DCFCLK we use
- * for DML. Unlike the debug option for forcing
- * DCFCLK, this override affects watermark calculations
- */
- int min_dcfclk_mhz;
-};
-
-struct resource_pool;
-struct dce_hwseq;
struct gpu_info_soc_bounding_box_v1_0;
struct dc {
+ struct dc_debug_options debug;
struct dc_versions versions;
struct dc_caps caps;
struct dc_cap_funcs cap_funcs;
struct dc_config config;
- struct dc_debug_options debug;
struct dc_bounding_box_overrides bb_overrides;
struct dc_bug_wa work_arounds;
struct dc_context *ctx;