diff options
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r-- | arch/arm/mach-exynos/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-exynos/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/mach-exynos/common.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-exynos/exynos.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-exynos/include/mach/map.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-exynos/pm.c | 8 |
7 files changed, 27 insertions, 39 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index f185cd3d4c62..d2d249706ebb 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -24,7 +24,6 @@ menuconfig ARCH_EXYNOS select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5 select HAVE_ARM_SCU if SMP select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C_RTC if RTC_CLASS select PINCTRL select PINCTRL_EXYNOS diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 0fd3fcf8bfb0..53fa363c8e44 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -3,10 +3,6 @@ # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. # http://www.samsung.com/ -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include - -# Core - obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o firmware.o obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index afd988a92836..29eb075b24a4 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -24,12 +24,12 @@ #define EXYNOS5800_SOC_ID 0xE5422000 #define EXYNOS5_SOC_MASK 0xFFFFF000 -extern unsigned long samsung_cpu_id; +extern unsigned long exynos_cpu_id; #define IS_SAMSUNG_CPU(name, id, mask) \ static inline int is_samsung_##name(void) \ { \ - return ((samsung_cpu_id & mask) == (id & mask)); \ + return ((exynos_cpu_id & mask) == (id & mask)); \ } IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK) @@ -147,7 +147,7 @@ extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data; extern void exynos_set_delayed_reset_assertion(bool enable); -extern unsigned int samsung_rev(void); +extern unsigned int exynos_rev(void); extern void exynos_core_restart(u32 core_id); extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr); extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr); diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 36c37444485a..700763e07083 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -19,11 +19,12 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/map.h> -#include <plat/cpu.h> - #include "common.h" +#define S3C_ADDR_BASE 0xF6000000 +#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) +#define S5P_VA_CHIPID S3C_ADDR(0x02000000) + static struct platform_device exynos_cpuidle = { .name = "exynos_cpuidle", #ifdef CONFIG_ARM_EXYNOS_CPUIDLE @@ -36,6 +37,14 @@ void __iomem *sysram_base_addr __ro_after_init; phys_addr_t sysram_base_phys __ro_after_init; void __iomem *sysram_ns_base_addr __ro_after_init; +unsigned long exynos_cpu_id; +static unsigned int exynos_cpu_rev; + +unsigned int exynos_rev(void) +{ + return exynos_cpu_rev; +} + void __init exynos_sysram_init(void) { struct device_node *node; @@ -86,7 +95,11 @@ static void __init exynos_init_io(void) of_scan_flat_dt(exynos_fdt_map_chipid, NULL); /* detect cpu id and rev. */ - s5p_init_cpu(S5P_VA_CHIPID); + exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID); + exynos_cpu_rev = exynos_cpu_id & 0xFF; + + pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id); + } /* @@ -193,8 +206,8 @@ static void __init exynos_dt_fixup(void) } DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)") - .l2c_aux_val = 0x3c400000, - .l2c_aux_mask = 0xc20fffff, + .l2c_aux_val = 0x38400000, + .l2c_aux_mask = 0xc60fffff, .smp = smp_ops(exynos_smp_ops), .map_io = exynos_init_io, .init_early = exynos_firmware_init, diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h deleted file mode 100644 index 8d58faa54ff7..000000000000 --- a/arch/arm/mach-exynos/include/mach/map.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Exynos - Memory map definitions - */ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H __FILE__ - -#include <plat/map-base.h> - -#include <plat/map-s5p.h> - -#define EXYNOS_PA_CHIPID 0x10000000 - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 0cbbae8bf1f8..d7fedbb2eefe 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -22,8 +22,6 @@ #include <asm/smp_scu.h> #include <asm/firmware.h> -#include <mach/map.h> - #include "common.h" extern void exynos4_secondary_startup(void); @@ -188,7 +186,7 @@ void exynos_scu_enable(void) static void __iomem *cpu_boot_reg_base(void) { - if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) + if (soc_is_exynos4210() && exynos_rev() == EXYNOS4210_REV_1_1) return pmu_base_addr + S5P_INFORM5; return sysram_base_addr; } diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 78af34cc89cc..30f4e55bf39e 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -26,18 +26,18 @@ static inline void __iomem *exynos_boot_vector_addr(void) { - if (samsung_rev() == EXYNOS4210_REV_1_1) + if (exynos_rev() == EXYNOS4210_REV_1_1) return pmu_base_addr + S5P_INFORM7; - else if (samsung_rev() == EXYNOS4210_REV_1_0) + else if (exynos_rev() == EXYNOS4210_REV_1_0) return sysram_base_addr + 0x24; return pmu_base_addr + S5P_INFORM0; } static inline void __iomem *exynos_boot_vector_flag(void) { - if (samsung_rev() == EXYNOS4210_REV_1_1) + if (exynos_rev() == EXYNOS4210_REV_1_1) return pmu_base_addr + S5P_INFORM6; - else if (samsung_rev() == EXYNOS4210_REV_1_0) + else if (exynos_rev() == EXYNOS4210_REV_1_0) return sysram_base_addr + 0x20; return pmu_base_addr + S5P_INFORM1; } |