diff options
| -rw-r--r-- | drivers/usb/dwc2/core.h | 61 | ||||
| -rw-r--r-- | drivers/usb/dwc2/gadget.c | 6 |
2 files changed, 26 insertions, 41 deletions
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index bca8463f00b0..ae8534bed884 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -1161,60 +1161,45 @@ struct dwc2_hsotg { #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */ }; -#ifdef CONFIG_MIPS -/* - * There are some MIPS machines that can run in either big-endian - * or little-endian mode and that use the dwc2 register without - * a byteswap in both ways. - * Unlike other architectures, MIPS apparently does not require a - * barrier before the __raw_writel() to synchronize with DMA but does - * require the barrier after the __raw_writel() to serialize a set of - * writes. This set of operations was added specifically for MIPS and - * should only be used there. - */ +/* Normal architectures just use readl/write */ static inline u32 dwc2_readl(struct dwc2_hsotg *hsotg, u32 offset) { - u32 value = __raw_readl(hsotg->regs + offset); - - /* In order to preserve endianness __raw_* operation is used. Therefore - * a barrier is needed to ensure IO access is not re-ordered across - * reads or writes - */ - mb(); - return value; + return readl(hsotg->regs + offset); } static inline void dwc2_writel(struct dwc2_hsotg *hsotg, u32 value, u32 offset) { - __raw_writel(value, hsotg->regs + offset); - - /* - * In order to preserve endianness __raw_* operation is used. Therefore - * a barrier is needed to ensure IO access is not re-ordered across - * reads or writes - */ - mb(); + writel(value, hsotg->regs + offset); + #ifdef DWC2_LOG_WRITES - pr_info("INFO:: wrote %08x to %p\n", value, hsotg->regs + offset); + pr_info("info:: wrote %08x to %p\n", value, hsotg->regs + offset); #endif } -#else -/* Normal architectures just use readl/write */ -static inline u32 dwc2_readl(struct dwc2_hsotg *hsotg, u32 offset) +static inline void dwc2_readl_rep(struct dwc2_hsotg *hsotg, u32 offset, + void *buffer, unsigned int count) { - return readl(hsotg->regs + offset); + if (count) { + u32 *buf = buffer; + + do { + u32 x = dwc2_readl(hsotg, offset); + *buf++ = x; + } while (--count); + } } -static inline void dwc2_writel(struct dwc2_hsotg *hsotg, u32 value, u32 offset) +static inline void dwc2_writel_rep(struct dwc2_hsotg *hsotg, u32 offset, + const void *buffer, unsigned int count) { - writel(value, hsotg->regs + offset); + if (count) { + const u32 *buf = buffer; -#ifdef DWC2_LOG_WRITES - pr_info("info:: wrote %08x to %p\n", value, hsotg->regs + offset); -#endif + do { + dwc2_writel(hsotg, *buf++, offset); + } while (--count); + } } -#endif /* Reasons for halting a host channel */ enum dwc2_halt_status { diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 50f94f277433..26fdb4b60ff6 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c @@ -599,7 +599,7 @@ static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg, to_write = DIV_ROUND_UP(to_write, 4); data = hs_req->req.buf + buf_pos; - iowrite32_rep(hsotg->regs + EPFIFO(hs_ep->index), data, to_write); + dwc2_writel_rep(hsotg, EPFIFO(hs_ep->index), data, to_write); return (to_write >= can_write) ? -ENOSPC : 0; } @@ -2169,8 +2169,8 @@ static void dwc2_hsotg_rx_data(struct dwc2_hsotg *hsotg, int ep_idx, int size) * note, we might over-write the buffer end by 3 bytes depending on * alignment of the data. */ - ioread32_rep(hsotg->regs + EPFIFO(ep_idx), - hs_req->req.buf + read_ptr, to_read); + dwc2_readl_rep(hsotg, EPFIFO(ep_idx), + hs_req->req.buf + read_ptr, to_read); } /** |