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authorMauro Carvalho Chehab <mchehab+samsung@kernel.org>2018-05-10 14:19:23 +0300
committerMauro Carvalho Chehab <mchehab+samsung@kernel.org>2018-05-10 14:19:23 +0300
commit71db1cd7ff4ea3b525ae7d9c97633ea281b7d981 (patch)
tree53ff3b8ecfc2869ec919e3423d69e07ddfaddd9a /tools/arch/arm/include/uapi/asm/kvm.h
parent7d95fb746c4eece67308f1642a666ea1ebdbd2cc (diff)
parent75bc37fefc4471e718ba8e651aa74673d4e0a9eb (diff)
downloadlinux-71db1cd7ff4ea3b525ae7d9c97633ea281b7d981.tar.xz
Merge tag 'v4.17-rc4' into patchwork
Linux 4.17-rc4 * tag 'v4.17-rc4': (920 commits) Linux 4.17-rc4 KVM: x86: remove APIC Timer periodic/oneshot spikes genksyms: fix typo in parse.tab.{c,h} generation rules kbuild: replace hardcoded bison in cmd_bison_h with $(YACC) gcc-plugins: fix build condition of SANCOV plugin MAINTAINERS: Update Kbuild entry with a few paths Revert "usb: host: ehci: Use dma_pool_zalloc()" platform/x86: Kconfig: Fix dell-laptop dependency chain. platform/x86: asus-wireless: Fix NULL pointer dereference arm64: vgic-v2: Fix proxying of cpuif access KVM: arm/arm64: vgic_init: Cleanup reference to process_maintenance KVM: arm64: Fix order of vcpu_write_sys_reg() arguments MAINTAINERS & files: Canonize the e-mails I use at files media: imx-media-csi: Fix inconsistent IS_ERR and PTR_ERR tools: power/acpi, revert to LD = gcc bdi: Fix oops in wb_workfn() RDMA/cma: Do not query GID during QP state transition to RTR IB/mlx4: Fix integer overflow when calculating optimal MTT size IB/hfi1: Fix memory leak in exception path in get_irq_affinity() IB/{hfi1, rdmavt}: Fix memory leak in hfi1_alloc_devdata() upon failure ...
Diffstat (limited to 'tools/arch/arm/include/uapi/asm/kvm.h')
-rw-r--r--tools/arch/arm/include/uapi/asm/kvm.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/tools/arch/arm/include/uapi/asm/kvm.h b/tools/arch/arm/include/uapi/asm/kvm.h
index 6edd177bb1c7..2ba95d6fe852 100644
--- a/tools/arch/arm/include/uapi/asm/kvm.h
+++ b/tools/arch/arm/include/uapi/asm/kvm.h
@@ -135,6 +135,15 @@ struct kvm_arch_memory_slot {
#define KVM_REG_ARM_CRM_SHIFT 7
#define KVM_REG_ARM_32_CRN_MASK 0x0000000000007800
#define KVM_REG_ARM_32_CRN_SHIFT 11
+/*
+ * For KVM currently all guest registers are nonsecure, but we reserve a bit
+ * in the encoding to distinguish secure from nonsecure for AArch32 system
+ * registers that are banked by security. This is 1 for the secure banked
+ * register, and 0 for the nonsecure banked register or if the register is
+ * not banked by security.
+ */
+#define KVM_REG_ARM_SECURE_MASK 0x0000000010000000
+#define KVM_REG_ARM_SECURE_SHIFT 28
#define ARM_CP15_REG_SHIFT_MASK(x,n) \
(((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK)