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| author | Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> | 2017-01-26 23:09:44 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2017-01-31 23:14:07 +0300 |
| commit | d74390b5fe47710e94b03b550d1b8b8f249cd416 (patch) | |
| tree | 7e374fde433e9c753a4e5bd7d961fee87edfedea /sound/soc/intel/boards/cht_bsw_rt5645.c | |
| parent | 22af29114eb4c400f6847d425caab460c6241c4e (diff) | |
| download | linux-d74390b5fe47710e94b03b550d1b8b8f249cd416.tar.xz | |
ASoC: Intel: cht-bsw-rt5645: select ASRC source based on routing quirk
Some platforms use AIF2, use routing information to set ASRC as needed
Suggested-by: Bard Liao <bardliao@realtek.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=95681
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel/boards/cht_bsw_rt5645.c')
| -rw-r--r-- | sound/soc/intel/boards/cht_bsw_rt5645.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c b/sound/soc/intel/boards/cht_bsw_rt5645.c index 24b07601fb81..b175eee5d416 100644 --- a/sound/soc/intel/boards/cht_bsw_rt5645.c +++ b/sound/soc/intel/boards/cht_bsw_rt5645.c @@ -265,13 +265,24 @@ static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) struct snd_soc_dai *codec_dai = runtime->codec_dai; struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card); - /* Select clk_i2s1_asrc as ASRC clock source */ - rt5645_sel_asrc_clk_src(codec, - RT5645_DA_STEREO_FILTER | - RT5645_DA_MONO_L_FILTER | - RT5645_DA_MONO_R_FILTER | - RT5645_AD_STEREO_FILTER, - RT5645_CLK_SEL_I2S1_ASRC); + if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) || + (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { + /* Select clk_i2s2_asrc as ASRC clock source */ + rt5645_sel_asrc_clk_src(codec, + RT5645_DA_STEREO_FILTER | + RT5645_DA_MONO_L_FILTER | + RT5645_DA_MONO_R_FILTER | + RT5645_AD_STEREO_FILTER, + RT5645_CLK_SEL_I2S2_ASRC); + } else { + /* Select clk_i2s1_asrc as ASRC clock source */ + rt5645_sel_asrc_clk_src(codec, + RT5645_DA_STEREO_FILTER | + RT5645_DA_MONO_L_FILTER | + RT5645_DA_MONO_R_FILTER | + RT5645_AD_STEREO_FILTER, + RT5645_CLK_SEL_I2S1_ASRC); + } if (cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) { ret = snd_soc_dapm_add_routes(&card->dapm, |