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authorHans de Goede <hdegoede@redhat.com>2018-05-08 18:35:46 +0300
committerMark Brown <broonie@kernel.org>2018-05-11 05:21:42 +0300
commit8e7a1f1f177fef28cbd5edc663044b8946d08ab2 (patch)
tree147ff1cd975ac0d706e1c416f607f41f92ca648f /sound/soc/codecs/nau8540.h
parentd165b5a86fcad715aea1f164186224fe0c2f57f3 (diff)
downloadlinux-8e7a1f1f177fef28cbd5edc663044b8946d08ab2.tar.xz
ASoC: rt5640: Remove is_sys_clk_from_pll, it has ordering issues
is_sys_clk_from_pll() is used as a snd_soc_dapm_route.connected callback, checking RT5640_GBL_CLK to determine if the sys-clk is PLL1 and thus the PWR_PLL bit in reg PWR_ANLG2 must be set. RT5640_GBL_CLK is changed by rt5640_set_dai_sysclk(), which gets called by the pre_pmu / post_pmd functions of the "Platform Clock" dapm-supply. This creates an ordering issue, during a dapm transition first all connected() callbacks are called to build a list of supplies to enable and then the complete list is walked to enable the supplies. Since the connected() check happens before enabling any supplies, is_sys_clk_from_pll() ends up deciding if the PWR_PLL bit should be set based on the state the "Platform Clock" supply had *before* the transition. This sometimes results in PWR_PLL being off, even though *after* the transition PLL1 is configured as sys-clk. This commit removes is_sys_clk_from_pll() instead simply setting / clearing PWR_PLL in rt5640_set_dai_sysclk() based on the selected sys-clk, which fixes this and as a bonus results in a nice cleanup. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/nau8540.h')
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