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authorJean-Philippe Brucker <jean-philippe.brucker@arm.com>2017-05-30 19:25:48 +0300
committerBjorn Helgaas <bhelgaas@google.com>2017-05-30 23:39:15 +0300
commita4f4fa681add289ebfec6d776376ad7a2ffda669 (patch)
treebad540deacc055ab92790af76e4e20f9107729a0 /scripts/bloat-o-meter
parent2ea659a9ef488125eb46da6eb571de5eae5c43f6 (diff)
downloadlinux-a4f4fa681add289ebfec6d776376ad7a2ffda669.tar.xz
PCI: Cache PRI and PASID bits in pci_dev
Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in order to know when they can use the SVM API. Cache PRI and PASID bits in the pci_dev structure, similarly to what is currently done for ATS. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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