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| author | Jakub Kicinski <kuba@kernel.org> | 2021-01-08 01:56:35 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2021-01-08 01:56:36 +0300 |
| commit | dd15c4a0ba999905bd53a860ada5ad9d3eb020c2 (patch) | |
| tree | 11452c0e73a21753d705247f4b6a0c458d74b109 /net/bridge/br_fdb.c | |
| parent | e6e918d4eb93f43e770fbc2a0881686e350e1a1f (diff) | |
| parent | acb58657c8694caa8a1ed99cf2a352382a0eb2b6 (diff) | |
| download | linux-dd15c4a0ba999905bd53a860ada5ad9d3eb020c2.tar.xz | |
Merge branch 'r8169-improve-rtl8168g-phy-suspend-quirk'
Heiner Kallweit says:
====================
r8169: improve RTL8168g PHY suspend quirk
According to Realtek the ERI register 0x1a8 quirk is needed to work
around a hw issue with the PHY on RTL8168g. The register needs to be
changed before powering down the PHY. Currently we don't meet this
requirement, however I'm not aware of any problems caused by this.
Therefore I see the change as an improvement.
The PHY driver has no means to access the chip ERI registers,
therefore we have to intercept MDIO writes to the BMCR register.
If the BMCR_PDOWN bit is going to be set, then let's apply the
quirk before actually powering down the PHY.
====================
Link: https://lore.kernel.org/r/9303c2cf-c521-beea-c09f-63b5dfa91b9c@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'net/bridge/br_fdb.c')
0 files changed, 0 insertions, 0 deletions