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authorYong Zhao <Yong.Zhao@amd.com>2017-07-27 19:48:22 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-08-15 21:45:58 +0300
commit51ac7eec620b8ec705955ad2c845a5b5fed6b40f (patch)
treedb1de1243647e0e728a331f0e38b12da9a6223f8 /init
parent2046d46db9166bddc84778f0b3477f6d1e9068ea (diff)
downloadlinux-51ac7eec620b8ec705955ad2c845a5b5fed6b40f.tar.xz
drm/amdgpu: Support IOMMU on Raven
We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for PDEs and setting S bit to 1 for PTEs when the corresponding addresses are not occupied by gpu driver allocated buffers. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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