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authorTao Zhou <tao.zhou1@amd.com>2021-07-14 00:13:48 +0300
committerAlex Deucher <alexander.deucher@amd.com>2021-07-23 17:08:00 +0300
commitd0f56dc25afba6e08be2d2611d5d19f97821aa64 (patch)
treeb4f478dbc828331bb34f86fb4944125d65593b16 /include
parent30ebc16aac645d8676531858c9fe2cff911c77e5 (diff)
downloadlinux-d0f56dc25afba6e08be2d2611d5d19f97821aa64.tar.xz
drm/amdgpu: add cyan_skillfish asic type
Add cyan_skillfish asic family. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include')
-rw-r--r--include/drm/amd_asic_type.h17
1 files changed, 9 insertions, 8 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
index 0bf0ad869eb9..0f66a0d9f06d 100644
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -53,14 +53,15 @@ enum amd_asic_type {
CHIP_RENOIR, /* 24 */
CHIP_ALDEBARAN, /* 25 */
CHIP_NAVI10, /* 26 */
- CHIP_NAVI14, /* 27 */
- CHIP_NAVI12, /* 28 */
- CHIP_SIENNA_CICHLID, /* 29 */
- CHIP_NAVY_FLOUNDER, /* 30 */
- CHIP_VANGOGH, /* 31 */
- CHIP_DIMGREY_CAVEFISH, /* 32 */
- CHIP_BEIGE_GOBY, /* 33 */
- CHIP_YELLOW_CARP, /* 34 */
+ CHIP_CYAN_SKILLFISH, /* 27 */
+ CHIP_NAVI14, /* 28 */
+ CHIP_NAVI12, /* 29 */
+ CHIP_SIENNA_CICHLID, /* 30 */
+ CHIP_NAVY_FLOUNDER, /* 31 */
+ CHIP_VANGOGH, /* 32 */
+ CHIP_DIMGREY_CAVEFISH, /* 33 */
+ CHIP_BEIGE_GOBY, /* 34 */
+ CHIP_YELLOW_CARP, /* 35 */
CHIP_LAST,
};