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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-08-30 23:17:29 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-08-30 23:17:29 +0300 |
| commit | 05b5fdb2a8f7f981b9b1aa77a6c4b810e19f01ab (patch) | |
| tree | 83d589bb0797eebfda5c094622cb6b878b57dc9b /include | |
| parent | c7a5238ef68b98130fe36716bb3fa44502f56001 (diff) | |
| parent | cf4e6d52f58399c777276172ec250502e19d5e63 (diff) | |
| download | linux-05b5fdb2a8f7f981b9b1aa77a6c4b810e19f01ab.tar.xz | |
Merge tag 'edac_updates_for_v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Borislav Petkov:
"The usual EDAC stuff which managed to trickle in for 5.15:
- Add new HBM2 (High Bandwidth Memory Gen 2) type and add support for
it to the Intel SKx drivers
- Print additional useful per-channel error information on i10nm,
like on SKL
- Don't load the AMD EDAC decoder in virtual images
- The usual round of fixes and cleanups"
* tag 'edac_updates_for_v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/i10nm: Retrieve and print retry_rd_err_log registers
EDAC/i10nm: Fix NVDIMM detection
EDAC/skx_common: Set the memory type correctly for HBM memory
EDAC/altera: Skip defining unused structures for specific configs
EDAC/mce_amd: Do not load edac_mce_amd module on guests
EDAC/mc: Add new HBM2 memory type
EDAC/amd64: Use DEVICE_ATTR helper macros
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/edac.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/edac.h b/include/linux/edac.h index 76d3562d3006..4207d06996a4 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h @@ -184,6 +184,7 @@ static inline char *mc_event_error_type(const unsigned int err_type) * @MEM_DDR5: Unbuffered DDR5 RAM * @MEM_NVDIMM: Non-volatile RAM * @MEM_WIO2: Wide I/O 2. + * @MEM_HBM2: High bandwidth Memory Gen 2. */ enum mem_type { MEM_EMPTY = 0, @@ -212,6 +213,7 @@ enum mem_type { MEM_DDR5, MEM_NVDIMM, MEM_WIO2, + MEM_HBM2, }; #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) @@ -239,6 +241,7 @@ enum mem_type { #define MEM_FLAG_DDR5 BIT(MEM_DDR5) #define MEM_FLAG_NVDIMM BIT(MEM_NVDIMM) #define MEM_FLAG_WIO2 BIT(MEM_WIO2) +#define MEM_FLAG_HBM2 BIT(MEM_HBM2) /** * enum edac_type - Error Detection and Correction capabilities and mode |