diff options
author | Jani Nikula <jani.nikula@intel.com> | 2019-10-28 18:00:43 +0300 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2019-11-07 15:58:16 +0300 |
commit | e85c659225c212a46380730ae6d8feba25aae654 (patch) | |
tree | bf2d736abe44b9a8a9e9370d61381662057ae09e /include/video | |
parent | 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c (diff) | |
download | linux-e85c659225c212a46380730ae6d8feba25aae654.tar.xz |
drm/dsi: clean up DSI data type definitions
Rename picture parameter set (it's a long packet, not a long write) and
compression mode (it's not a DCS command) enumerations according to the
DSI specification. Order the types according to the spec. Use tabs
instead of spaces for indentation. Use all lower case for hex.
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191028150047.22048-1-jani.nikula@intel.com
Diffstat (limited to 'include/video')
-rw-r--r-- | include/video/mipi_display.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h index cba57a678daf..79fd71cf4934 100644 --- a/include/video/mipi_display.h +++ b/include/video/mipi_display.h @@ -17,6 +17,9 @@ enum { MIPI_DSI_H_SYNC_START = 0x21, MIPI_DSI_H_SYNC_END = 0x31, + MIPI_DSI_COMPRESSION_MODE = 0x07, + MIPI_DSI_END_OF_TRANSMISSION = 0x08, + MIPI_DSI_COLOR_MODE_OFF = 0x02, MIPI_DSI_COLOR_MODE_ON = 0x12, MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, @@ -35,18 +38,15 @@ enum { MIPI_DSI_DCS_READ = 0x06, - MIPI_DSI_DCS_COMPRESSION_MODE = 0x07, - MIPI_DSI_PPS_LONG_WRITE = 0x0A, - MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, - MIPI_DSI_END_OF_TRANSMISSION = 0x08, - MIPI_DSI_NULL_PACKET = 0x09, MIPI_DSI_BLANKING_PACKET = 0x19, MIPI_DSI_GENERIC_LONG_WRITE = 0x29, MIPI_DSI_DCS_LONG_WRITE = 0x39, + MIPI_DSI_PICTURE_PARAMETER_SET = 0x0a, + MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c, |