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| author | Chen, Gong <gong.chen@linux.intel.com> | 2014-08-13 10:22:40 +0400 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-25 19:42:40 +0400 |
| commit | 846fc70986a65563a19ae86928c3acf34f12296d (patch) | |
| tree | 23f5dbab066154b3ecb69ca89b14cf1f8a90452c /include/ras/ras_event.h | |
| parent | d179111767aa2a1d594023ce65abf9c81bfbb0cf (diff) | |
| download | linux-846fc70986a65563a19ae86928c3acf34f12296d.tar.xz | |
PCI/AER: Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND
In PCIe r1.0, sec 5.10.2, bit 0 of the Uncorrectable Error Status, Mask,
and Severity Registers was for "Training Error." In PCIe r1.1, sec 7.10.2,
bit 0 was redefined to be "Undefined."
Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND to reflect this change.
No functional change.
[bhelgaas: changelog]
Signed-off-by: Chen, Gong <gong.chen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/ras/ras_event.h')
| -rw-r--r-- | include/ras/ras_event.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h index 0f04a9755d1e..79abb9c71772 100644 --- a/include/ras/ras_event.h +++ b/include/ras/ras_event.h @@ -185,7 +185,7 @@ TRACE_EVENT(mc_event, {PCI_ERR_COR_LOG_OVER, "Header Log Overflow"} #define aer_uncorrectable_errors \ - {PCI_ERR_UNC_TRAIN, "Undefined"}, \ + {PCI_ERR_UNC_UND, "Undefined"}, \ {PCI_ERR_UNC_DLP, "Data Link Protocol Error"}, \ {PCI_ERR_UNC_SURPDN, "Surprise Down Error"}, \ {PCI_ERR_UNC_POISON_TLP,"Poisoned TLP"}, \ |