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| author | Stephen Boyd <sboyd@kernel.org> | 2018-12-15 00:27:39 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-12-15 00:27:53 +0300 |
| commit | 3315fe5faff4e38fafba8434ea75d90ed66a44c6 (patch) | |
| tree | 1fd419860852e75df3256c2a4335f7b49faee975 /include/dt-bindings | |
| parent | f4ad7fba066f70ccd50816476e2f8700013c0724 (diff) | |
| parent | 8d3e5b9c1f2cdb9c81073e1f51643617078076ed (diff) | |
| download | linux-3315fe5faff4e38fafba8434ea75d90ed66a44c6.tar.xz | |
Merge branch 'clk-qcom-sdm845-lpass' into clk-next
- Qualcomm SDM845 audio subsystem clks
* clk-qcom-sdm845-lpass:
clk: qcom: Add lpass clock controller driver for SDM845
dt-bindings: clock: Introduce QCOM LPASS clock bindings
dt-bindings: clock: Update GCC bindings for protected-clocks
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/qcom,gcc-sdm845.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/qcom,lpass-sdm845.h | 15 |
2 files changed, 17 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,gcc-sdm845.h b/include/dt-bindings/clock/qcom,gcc-sdm845.h index b8eae5a76503..968fa65b9c42 100644 --- a/include/dt-bindings/clock/qcom,gcc-sdm845.h +++ b/include/dt-bindings/clock/qcom,gcc-sdm845.h @@ -197,6 +197,8 @@ #define GCC_QSPI_CORE_CLK_SRC 187 #define GCC_QSPI_CORE_CLK 188 #define GCC_QSPI_CNOC_PERIPH_AHB_CLK 189 +#define GCC_LPASS_Q6_AXI_CLK 190 +#define GCC_LPASS_SWAY_CLK 191 /* GCC Resets */ #define GCC_MMSS_BCR 0 diff --git a/include/dt-bindings/clock/qcom,lpass-sdm845.h b/include/dt-bindings/clock/qcom,lpass-sdm845.h new file mode 100644 index 000000000000..659050846f61 --- /dev/null +++ b/include/dt-bindings/clock/qcom,lpass-sdm845.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_SDM_LPASS_SDM845_H +#define _DT_BINDINGS_CLK_SDM_LPASS_SDM845_H + +#define LPASS_Q6SS_AHBM_AON_CLK 0 +#define LPASS_Q6SS_AHBS_AON_CLK 1 +#define LPASS_QDSP6SS_XO_CLK 2 +#define LPASS_QDSP6SS_SLEEP_CLK 3 +#define LPASS_QDSP6SS_CORE_CLK 4 + +#endif |