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| author | Jeff Garzik <jeff@garzik.org> | 2006-05-02 22:33:57 +0400 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-05-02 22:33:57 +0400 |
| commit | 1fb5fef9b80d9a3b5368e22031627afd1585487b (patch) | |
| tree | 54f07a532b5b2622b8642156bbcaeca637fcdb8f /include/asm-ppc/reg_booke.h | |
| parent | 1a2e8a6f8ec0a068911a882a19e0912a0c89be6e (diff) | |
| parent | 330ab71619bacc4d4494227a6cfc9b7f5500403d (diff) | |
| download | linux-1fb5fef9b80d9a3b5368e22031627afd1585487b.tar.xz | |
Merge branch 'master' into upstream
Diffstat (limited to 'include/asm-ppc/reg_booke.h')
| -rw-r--r-- | include/asm-ppc/reg_booke.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 00ad9c754c78..4944c0fb8bea 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h @@ -237,6 +237,7 @@ do { \ #endif /* Bit definitions for CCR1. */ +#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */ #define CCR1_TCS 0x00000080 /* Timer Clock Select */ /* Bit definitions for the MCSR. */ |